Jinyi Shen
Orcid: 0009-0009-2362-0361
According to our database1,
Jinyi Shen authored at least 8 papers
between 2025 and 2026.
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Bibliography
2026
Variation-aware Analog Circuit Design via Contextual Modeling and Robust Optimization.
ACM Trans. Design Autom. Electr. Syst., March, 2026
Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2026
2025
CoRR, August, 2025
Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2025
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
TL-CSE: Microarchitecture-Compiler Co-design Space Exploration via Transfer Learning.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025