Jiangli Huang

According to our database, Jiangli Huang authored at least 11 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Variation-aware Analog Circuit Design via Contextual Modeling and Robust Optimization.

Jiangli Huang, Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng

ACM Trans. Design Autom. Electr. Syst., March, 2026

Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents.

Jinyi Shen, Zihao Chen, Ji Zhuang, Jiangli Huang, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2026

2025

HSG-RAG: Hierarchical Knowledge Base Construction for Embedded System Development.

Zhouyang Lu, Hailin Xu, Anrui Chen, Siyuan Tang, Junyi Zhang, Yifei Feng, Wentao Pan, Jiangli Huang

ACM Trans. Design Autom. Electr. Syst., November, 2025

AnalogSeeker: An Open-source Foundation Language Model for Analog Circuit Design.

Zihao Chen, Ji Zhuang, Jinyi Shen, Xiaoyue Ke, Xinyi Yang, Mingjie Zhou, Zhuoyao Du, Xu Yan, Zhouyang Wu, Zhenyu Xu, Jiangli Huang, Li Shang, Xuan Zeng, Fan Yang

CoRR, August, 2025

2024

A Compact 0.1-1.95 GHz, 1.5 dB NF LNTA Based on Cascode Inverters.

Cong Tao, Jiangli Huang, Liangbo Lei, Yumei Huang, Zhiliang Hong, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model.

Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

Automatic Op-Amp Generation From Specification to Layout.

Jialin Lu, Liangbo Lei, Jiangli Huang, Fan Yang, Li Shang, Xuan Zeng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling.

Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

2021

Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process.

Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization.

Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB.

Cong Tao, Liangbo Lei, Jiangli Huang, Zhipeng Chen, Yumei Huang, Zhiliang Hong

Proceedings of the 14th IEEE International Conference on ASIC, 2021