Jonathan D. Harms
According to our database1,
Jonathan D. Harms
authored at least 3 papers
between 2010 and 2018.
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Bibliography
2018
2013
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory.
IEEE J. Solid State Circuits, 2013
2010
Proceedings of the 28th International Conference on Computer Design, 2010