Jörg Mische

Orcid: 0000-0002-8345-2760

According to our database1, Jörg Mische authored at least 28 papers between 2007 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
PIMP My Many-Core: Pipeline-Integrated Message Passing.
Int. J. Parallel Program., 2021

2018
Analysing Real-Time Behaviour of Collective Communication Patterns in MPI.
Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018

Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

2017
Minimally buffered deflection routing with in-order delivery in a torus.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017

Reduced Complexity Many-Core: Timing Predictability Due to Message-Passing.
Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017

2016
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.
ACM Trans. Embed. Comput. Syst., 2016

WCTT bounds for MPI primitives in the PaterNoster NoC.
SIGBED Rev., 2016

Employing MPI Collectives for Timing Analysis on Embedded Multi-Cores.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

2014
Guaranteed Service Independent of the Task Placement in NoCs with Torus Topology.
Proceedings of the 22nd International Conference on Real-Time Networks and Systems, 2014

2013
A hard real-time capable multi-core SMT processor.
ACM Trans. Embed. Comput. Syst., 2013


2012
Low power flitwise routing in an unidirectional torus with minimal buffering.
Proceedings of the Fifth International Workshop on Network on Chip Architectures, 2012

2011
Echtzeitfähige Ablaufplanung für simultan mehrfädige Prozessoren.
PhD thesis, 2011

RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor.
Comput. Syst. Sci. Eng., 2011

Dynamic Classification for Embedded Real-Time Systems.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

2010
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability.
IEEE Micro, 2010

Using SMT to Hide Context Switch Times of Large Real-Time Tasksets.
Proceedings of the 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2010

RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

Optimisation of Energy Consumption of Soft Real-Time Applications by Workload Prediction.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010

How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT.
Proceedings of the Architecture of Computing Systems, 2010

Dynamic Workload Prediction for Soft Real-Time Applications.
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010

2009
Implementing AUTOSAR scheduling and resource management on an embedded SMT processor.
Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems, 2009

IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

2008
A Two-Layered Management Architecture for Building Adaptive Real-Time Systems.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2008

Predictable dynamic instruction scratchpad for simultaneous multithreaded processors.
Proceedings of the 9th workshop on MEmory performance, 2008

Exploiting spare resources of in-order SMT processors executing hard real-time threads.
Proceedings of the 26th International Conference on Computer Design, 2008

An Operating System Architecture for Organic Computing in Embedded Real-Time Systems.
Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008

2007
An IP Core for Embedded Java Systems.
Proceedings of the Embedded Computer Systems: Architectures, 2007


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