Eduardo Quiñones

Proceedings of the OpenMP: Enabling Massive Node-Level Parallelism, 2021

A Low Overhead Tasking Model for OpenMP.

[BibT_eX]

[DOI]

Chenle Yu

Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021

2020

Enabling Ada and OpenMP runtimes interoperability through template-based execution.

[BibT_eX]

[DOI]

Luís Miguel Pinho

J. Syst. Archit., 2020

Static Analysis to Enhance Programmability and Performance in OmpSs-2.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing, 2020

OpenMP to CUDA graphs: a compiler-based transformation to enhance the programmability of NVIDIA devices.

[BibT_eX]

[DOI]

Chenle Yu

Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020

Distributed Training on a Highly Heterogeneous HPC System.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020

Experiences on the characterization of parallel applications in embedded systems with Extrae/Paraver.

[BibT_eX]

[DOI]

Proceedings of the ICPP 2020: 49th International Conference on Parallel Processing, 2020

Towards a Qualifiable OpenMP Framework for Embedded Systems.

[BibT_eX]

[DOI]

Adrian Munera

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

The Cooperative Parallel: A Discussion About Run-Time Schedulers for Nested Parallelism.

[BibT_eX]

[DOI]

Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

2018

Big Data Analytics for Smart Cities: The H2020 CLASS Project.

[BibT_eX]

[DOI]

Proceedings of the 11th ACM International Systems and Storage Conference, 2018

Towards an OpenMP Specification for Critical Real-Time Systems.

[BibT_eX]

[DOI]

Maria A. Serrano

Proceedings of the Evolving OpenMP for Evolving Architectures, 2018

Converging safety and high-performance domains: Integrating OpenMP into Ada.

[BibT_eX]

[DOI]

Luís Miguel Pinho

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Response-time analysis of DAG tasks supporting heterogeneous computing.

[BibT_eX]

[DOI]

Maria A. Serrano

Proceedings of the 55th Annual Design Automation Conference, 2018

Safe Parallelism: Compiler Analysis Techniques for Ada and OpenMP.

[BibT_eX]

[DOI]

Proceedings of the Reliable Software Technologies - Ada-Europe 2018, 2018

2017

Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Adapting TDMA arbitration for measurement-based probabilistic timing analysis.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2017

Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

A Functional Safety OpenMP ^* for Critical Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Scaling OpenMP for Exascale Performance and Portability, 2017

An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-Based Global Fixed Priority Scheduling.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Real-Time Distributed Computing, 2017

Probabilistic timing analysis on time-randomized platforms for the space domain.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

A static scheduling approach to enable safety-critical OpenMP applications.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

OpenMP Tasking Model for Ada: Safety and Correctness.

[BibT_eX]

[DOI]

Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017

2016

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2016

Fitting processor architectures for measurement-based probabilistic timing analysis.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Measurement-Based Timing Analysis of the AURIX Caches.

[BibT_eX]

[DOI]

Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Modelling the confidence of timing analysis for time randomised caches.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

A confidence assessment of WCET estimates for software time randomized caches.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

TASA: toolchain-agnostic static software randomisation for critical real-time systems.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Response-time analysis of DAG tasks under fixed priority scheduling with limited preemptions.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Improving performance guarantees in wormhole mesh NoC designs.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Supertask: Maximizing runnable-level parallelism in AUTOSAR applications.

[BibT_eX]

[DOI]

Jorge Becerril Sandoval

Jaume Abella

Francisco J. Cazorla

Günter Schäfer

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

A lightweight OpenMP4 run-time for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

P-SOCRATES: A parallel software framework for time-critical many-core systems.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2015

Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems.

[BibT_eX]

[DOI]

Leibniz Trans. Embed. Syst., 2015

WCET analysis methods: Pitfalls and challenges on their trustworthiness.

[BibT_eX]

[DOI]

Mikel Azkarate-askasua

Jon Pérez

Enrico Mezzetti

Tullio Vardanega

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Introduction to partial time composability for COTS multicores.

[BibT_eX]

[DOI]

Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Enabling TDMA Arbitration in the Context of MBPTA.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Timing analysis of an avionics case study on complex hardware/software platforms.

[BibT_eX]

[DOI]

Liliana Cucu-Grosjean

Tullio Vardanega

Francisco J. Cazorla

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

OpenMP and timing predictability: a possible union?

[BibT_eX]

[DOI]

Roberto Vargas

Andrea Marongiu

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

PACO: fast average-performance estimation for time-randomized caches.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Parallel execution of AUTOSAR legacy applications on multicore ECUs with timed implicit communication.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Resource usage templates and signatures for COTS multicore processors.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Increasing confidence on measurement-based contention bounds for real-time round-robin buses.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Timing characterization of OpenMP4 tasking model.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Compilers, 2015

Speeding up Static Probabilistic Timing Analysis.

[BibT_eX]

[DOI]

Proceedings of the Architecture of Computing Systems - ARCS 2015, 2015

2014

Efficient Cache Designs for Probabilistically Analysable Real-Time Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments.

[BibT_eX]

[DOI]

IEEE Micro, 2014

The Challenge of Time-Predictability in Modern Many-Core Architectures.

[BibT_eX]

[DOI]

Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art.

[BibT_eX]

[DOI]

Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.

[BibT_eX]

[DOI]

Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014

AHRB: A high-performance time-composable AMBA AHB bus.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

Parallel many-core avionics systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Embedded Software, 2014

PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

P-SOCRATES: A Parallel Software Framework for Time-Critical Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Bus designs for time-probabilistic multicore processors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013

Timing effects of DDR memory systems in hard real-time multicore architectures: Issues and solutions.

[BibT_eX]

[DOI]

Marco Paolieri

Francisco J. Cazorla

ACM Trans. Embed. Comput. Syst., 2013

A hard real-time capable multi-core SMT processor.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2013

PROARTIS: Probabilistically Analyzable Real-Time Systems.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2013

Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources.

[BibT_eX]

[DOI]

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Upper-bounding Program Execution Time with Extreme Value Theory.

[BibT_eX]

[DOI]

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Deconstructing bus access control policies for Real-Time multicores.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 34th Real-Time Systems Symposium, 2013

On-chip ring network designs for hard-real time systems.

[BibT_eX]

[DOI]

Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013

Achieving timing composability with measurement-based probabilistic timing analysis.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Probabilistic timing analysis on conventional cache designs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

A cache design for probabilistically analysable real-time systems.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

On the convergence of mainstream and mission-critical markets.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

Assessing the suitability of the NGMP multi-core processor in the space domain.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Embedded Software, 2012

Measurement-Based Probabilistic Timing Analysis for Multi-path Programs.

[BibT_eX]

[DOI]

Liliana Cucu-Grosjean

Proceedings of the 24th Euromicro Conference on Real-Time Systems, 2012

2011

Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systems.

[BibT_eX]

[DOI]

SIGBED Rev., 2011

IA^3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011

A Software-Pipelined Approach to Multicore Execution of Timing Predictable Multi-threaded Hard Real-Time Tasks.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2011

RVC-based time-predictable faulty caches for safety-critical systems.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Towards improved survivability in safety-critical systems.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

RVC: a mechanism for time-analyzable real-time processors with faulty caches.

[BibT_eX]

[DOI]

Proceedings of the High Performance Embedded Architectures and Compilers, 2011

2010

Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2010

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability.

[BibT_eX]

[DOI]

IEEE Micro, 2010

2009

An Analyzable Memory Controller for Hard Real-Time CMPs.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2009

Hardware support for WCET analysis of hard real-time multicore systems.

[BibT_eX]

[DOI]

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

Using Randomized Caches in Probabilistic Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Real-Time Systems, 2009

2008

Predicated execution and register windows for out-of-order processors.

[BibT_eX]

[DOI]

PhD thesis, 2008

2007

Improving Branch Prediction and Predicated Execution in Out-of-Order Processors.

[BibT_eX]

[DOI]

Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007

Early Register Release for Out-of-Order Processors with RegisterWindows.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006

Selective predicate prediction for out-of-order processors.

[BibT_eX]

[DOI]