Pascal Sainrat

According to our database, Pascal Sainrat authored at least 52 papers between 1989 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution.

Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat

IEEE Trans. Computers, 2023

Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators.

Alban Gruin, Thomas Carle, Christine Rochange, Pascal Sainrat

Proceedings of the 21th International Workshop on Worst-Case Execution Time Analysis, 2023

Enabling timing predictability in the presence of store buffers.

Alban Gruin, Thomas Carle, Christine Rochange, Pascal Sainrat

Proceedings of the 31st International Conference on Real-Time Networks and Systems, 2023

2016

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore.

Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

ACM Trans. Embed. Comput. Syst., 2016

Mapping hard real-time applications on many-core processors.

Quentin Perret, Pascal Maurère, Éric Noulard, Claire Pagetti, Pascal Sainrat, Benoît Triquet

Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016

Temporal Isolation of Hard Real-Time Applications on Many-Core Processors.

Quentin Perret, Pascal Maurère, Eric Noulard, Claire Pagetti, Pascal Sainrat, Benoit Triquet

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

2014

Minimizing the cost of synchronisations in the WCET of real-time parallel programs.

Haluk Ozaktas, Christine Rochange, Pascal Sainrat

Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014

Time-Predictable Architectures.

Christine Rochange, Sascha Uhrig, Pascal Sainrat

FOCUS - Computer Engineering Series, iSTE / Wiley, ISBN: 978-1-84821-593-1, 2014

2013

Automatic WCET Analysis of Real-Time Parallel Applications.

Haluk Ozaktas, Christine Rochange, Pascal Sainrat

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

Multi-architecture Value Analysis for Machine Code.

Hugues Cassé, Florian Birée, Pascal Sainrat

Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.

Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets.

Roman Bourgade, Christine Rochange, Pascal Sainrat

Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012

Time analysable synchronisation techniques for parallelised hard real-time applications.

Mike Gerdes, Florian Kluge, Theo Ungerer, Christine Rochange, Pascal Sainrat

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

Éditorial.

Pascal Sainrat

Tech. Sci. Informatiques, 2011

RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor.

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer

Comput. Syst. Sci. Eng., 2011

Predictable bus arbitration schemes for heterogeneous time-critical workloads running on multicore processors.

Roman Bourgade, Christine Rochange, Pascal Sainrat

Proceedings of the IEEE 16th Conference on Emerging Technologies & Factory Automation, 2011

2010

Architecture d'un processeur multiflot orienté temps-réel.

Jonathan Barre, Christine Rochange, Pascal Sainrat

Tech. Sci. Informatiques, 2010

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability.

Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische

IEEE Micro, 2010

WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core.

Christine Rochange, Armelle Bonenfant, Pascal Sainrat, Mike Gerdes, Julian Wolf, Theo Ungerer, Zlatko Petrov, Frantisek Mikulu

Proceedings of the 10th International Workshop on Worst-Case Execution Time Analysis, 2010

OTAWA: An Open Toolbox for Adaptive WCET Analysis.

Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat

Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2010

RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor.

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer

Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

Experimentation of WCET computation on both ends of automotive processor range.

Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel

Proceedings of the 1st Workshop on Critical Automotive Applications: Robustness & Safety, 2010

2009

A Context-Parameterized Model for Static Analysis of Execution Times.

Christine Rochange, Pascal Sainrat

Trans. High Perform. Embed. Archit. Compil., 2009

2008

WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis.

Niklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan

Proceedings of the 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2008

Inter-task WCET computation for a-way instruction caches.

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun

Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

An architecture for the simultaneous execution of hard real-time threads.

Jonathan Barre, Christine Rochange, Pascal Sainrat

Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

An improved approach for set-associative instruction cache partial analysis.

Clément Ballabriga, Hugues Cassé, Pascal Sainrat

Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation.

Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat

Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008

A Predictable Simultaneous Multithreading Scheme for Hard Real-Time.

Jonathan Barre, Christine Rochange, Pascal Sainrat

Proceedings of the Architecture of Computing Systems, 2008

2007

High-Performance Embedded Architecture and Compilation Roadmap.

Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam

Trans. High Perform. Embed. Archit. Compil., 2007

Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis.

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada

Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

2006

PapaBench: a Free Real-Time Benchmark.

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun, Marianne De Michiel

Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006

Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis.

Djemai Kebbal, Pascal Sainrat

Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006

Modeling Instruction-Level Parallelism for WCET Evaluation.

Jonathan Barre, Cédric Landet, Christine Rochange, Pascal Sainrat

Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006

2005

Régulation du flot d'instructions pour des processeurs orientés temps réel.

Christine Rochange, Pascal Sainrat

Tech. Sci. Informatiques, 2005

A Case for Static Branch Prediction in Real-Time Systems.

Claire Burguière, Christine Rochange, Pascal Sainrat

Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005

A time-predictable execution mode for superscalar pipelines with instruction prescheduling.

Christine Rochange, Pascal Sainrat

Proceedings of the Second Conference on Computing Frontiers, 2005

2003

Optimisations du chargement des instructions.

Thierry Haquin, Philippe Reynes, Christine Rochange, Pascal Sainrat

Tech. Sci. Informatiques, 2003

Calcul de majorants de pire temps d'exécution : état de l'art.

Antoine Colin, Isabelle Puaut, Christine Rochange, Pascal Sainrat

Tech. Sci. Informatiques, 2003

Towards Designing WCET-Predictable Processors.

Christine Rochange, Pascal Sainrat

Proceedings of the 3rd International Workshop on Worst-Case Execution Time Analysis, 2003

2002

Une approche pour réduire la complexité du flot de contrôle dans les programmes C.

Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat

Tech. Sci. Informatiques, 2002

2000

Architecture of Parallel and Distributed Systems.

Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat

Proceedings of the Handbook on Parallel and Distributed Processing, 2000

1999

Using the abstract interpretation technique for static pointer analysis.

Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat

SIGARCH Comput. Archit. News, 1999

Instruction-Level Parallelism and Uniprocessor Architecture - Introduction.

Pascal Sainrat, Mateo Valero

Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1996

Multiple-Block Ahead Branch Predictors.

André Seznec, Stéphan Jourdan, Pascal Sainrat, Pierre Michaud

Proceedings of the ASPLOS-VII Proceedings, 1996

1995

An investigation of the performance of various instruction-issue buffer topologies.

Stéphan Jourdan, Pascal Sainrat, Daniel Litaize

Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

Exploring Configurations of Functional Units in an Out-of-Order Superscalar Processor.

Stéphan Jourdan, Pascal Sainrat, Daniel Litaize

Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1993

Performance of M3S for the SOR algorithm.

Christine Rochange, Pascal Sainrat, Daniel Litaize

Proceedings of the PARLE '93, 1993

1992

The Design of the M3S: A Multiported Shared-Memory Multiprocessor.

Pascal Sainrat, Abdelaziz Mzoughi, Christine Rochange, Daniel Litaize

Proceedings of the Proceedings Supercomputing '92, 1992

Towards a Shared-Memory Massively Parallel Multiprocessor.

Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat

Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

1989

Multiprocessors with a serial multiport memory and a pseudo crossbar of serial links used s a processor-memeory switch.

Daniel Litaize, Omar Hammami, Mustapha Lalam, Abdelaziz Mzoughi, Pascal Sainrat

SIGARCH Comput. Archit. News, 1989

Serial Multiport Memory Multiprocessors.

Daniel Litaize, Fatimazhra Elkhlifi, Omar Hammami, Mustapha Lalam, Abdelaziz Mzoughi, Pascal Sainrat, Jean-Claude Salinier

Proceedings of the PARLE '89: Parallel Architectures and Languages Europe, 1989