Joung-Wook Moon

According to our database, Joung-Wook Moon authored at least 4 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration.

Jin-Seok Heo, Kihan Kim, Dong-Hoon Lee, Chang-Kyo Lee, Daesik Moon, Kiho Kim, Jin-Hyeok Baek, Sung-Woo Yoon, Hui-Kap Yang, Kyungryun Kim, Youngjae Kim, Bokgue Park, Su-Jin Park, Joung-Wook Moon, Jae-Hyung Lee, Yun-Sik Park, Soobong Jang, Seok-Hun Hyun, Hyuck-Joon Kwon, Jung-Hwan Choi, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Jung-Bae Lee

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018

An Enhanced Built-off-Test Transceiver with Wide-range, Self-calibration Engine for 3.2 Gb/s/pin DDR4 SDRAM.

Joung-Wook Moon, Hye-Sung Yoo, Hundai Choi, Il-Won Park, Seok-Yong Kang, Jun-Bae Kim, Haeyoung Chung, Kiho Kim, Dong-Hun Lee, Ki-Jae Song, Seok-Hun Hyun, Indal Song, Young-Soo Sohn, Yong-Ho Cho, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2014

A 0.4-V, 90 ∼ 350-MHz PLL With an Active Loop-Filter Charge Pump.

Joung-Wook Moon, Kwang-Chun Choi, Woo-Young Choi

IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 0.4-V, 500-MHz, ultra-low-power phase-locked loop for near-threshold voltage operation.

Joung-Wook Moon, Sung-Geun Kim, Dae Hyun Kwon, Woo-Young Choi

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014