Junkang Zhu

According to our database, Junkang Zhu authored at least 9 papers between 2016 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

An 8-bit 20.7 TOPS/W Multilevel Cell ReRAM Macro With ADC-Assisted Bit-Serial Processing.

Justin M. Correll, Lu Jie, Seungheun Song, Seungjong Lee, Junkang Zhu, Wei Tang, Luke Wormald, Jack Erhardt, Nicolas Breil, Roger Quon, Deepak Kamalanathan, Siddarth A. Krishnan, Michael Chudzik, Wei D. Lu, Zhengya Zhang, Michael P. Flynn

IEEE J. Solid State Circuits, August, 2025

HiPER: Hierarchically-Composed Processing for Efficient Robot Learning-Based Control.

Justin Ting, Minsik Kim, Junkang Zhu, Haotian Sheng, Zhengya Zhang

Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

2024

Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.

Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang

IEEE J. Solid State Circuits, April, 2024

2023

Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm² AIB 2.0 Interface to Provide Versatile Workload Acceleration.

Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

eNODE: Energy-Efficient and Low-Latency Edge Inference and Training of Neural ODEs.

Junkang Zhu, Yaoyu Tao, Zhengya Zhang

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters.

Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang

IEEE J. Solid State Circuits, 2022

An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine.

Justin M. Correll, Lu Jie, Seungheun Song, Seungjong Lee, Junkang Zhu, Wei Tang, Luke Wormald, Jack Erhardt, Nicolas Breil, Roger Quon, Deepak Kamalanathan, Siddarth A. Krishnan, Michael Chudzik, Zhengya Zhang, Wei D. Lu, Michael P. Flynn

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters.

Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2016

Contextual Similarity Regularized Metric Learning for person re-identification.

Jin Wang, Junkang Zhu, Zheng Wang, Changxin Gao, Nong Sang, Rui Huang

Proceedings of the 23rd International Conference on Pattern Recognition, 2016