Wei Lu

Orcid: 0000-0003-4731-1976

Affiliations:
  • University of Michigan, Department of Electrical Engineering and Computer Science, MI, USA
  • Harvard University, Cambridge, MA, USA (2003 - 2005)
  • Rice University, Houston, TX, USA (PhD 2003)
  • Tsinghua University, Beijing, China (PhD 2003)


According to our database1, Wei Lu authored at least 57 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
TT-CIM: Tensor Train Decomposition for Neural Network in RRAM-Based Compute-in-Memory Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

Side-Channel Attack Analysis on In-Memory Computing Architectures.
IEEE Trans. Emerg. Top. Comput., 2024

2023
PowerGAN: A Machine Learning Approach for Power Side-Channel Attack on Compute-in-Memory Accelerators.
Adv. Intell. Syst., December, 2023

Training Spiking Neural Networks Using Lessons From Deep Learning.
Proc. IEEE, September, 2023

Research Challenges for Energy-Efficient Computing in Automated Vehicles.
Computer, March, 2023

PIM-GPT: A Hybrid Process-in-Memory Accelerator for Autoregressive Transformers.
CoRR, 2023

Bulk-Switching Memristor-based Compute-In-Memory Module for Deep Neural Network Training.
CoRR, 2023

RN-Net: Reservoir Nodes-Enabled Neuromorphic Vision Sensing Network.
CoRR, 2023

2022
TAICHI: A Tiled Architecture for In-Memory Computing and Heterogeneous Integration.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Gradient-Based Neuromorphic Learning on Dynamical RRAM Arrays.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Exploring Compute-in-Memory Architecture Granularity for Structured Pruning of Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Intelligence Processing Units Accelerate Neuromorphic Learning.
CoRR, 2022

The fine line between dead neurons and sparsity in binarized spiking neural networks.
CoRR, 2022

Columnar Learning Networks for Multisensory Spatiotemporal Learning.
Adv. Intell. Syst., 2022

Device Variation Effects on Neural Network Inference Accuracy in Analog In-Memory Computing Systems.
Adv. Intell. Syst., 2022

An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Spatiotemporal Spike Pattern Detection with Second-order Memristive Synapses.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design Space Exploration of Dense and Sparse Mapping Schemes for RRAM Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Navigating Local Minima in Quantized Spiking Neural Networks.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
Memristive Stochastic Computing for Deep Learning Parameter Optimization.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Hierarchical architectures in reservoir computing systems.
Neuromorph. Comput. Eng., 2021

Hierarchical Architectures in Reservoir Computing Systems.
CoRR, 2021

Neural connectivity inference with spike-timing dependent plasticity network.
Sci. China Inf. Sci., 2021

Neural Functional Connectivity Reconstruction with Second-Order Memristor Network.
Adv. Intell. Syst., 2021

Device Non-Ideality Effects and Architecture-Aware Training in RRAM In-Memory Computing Modules.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Stabilization of Mode-Dependent Impulsive Hybrid Systems Driven by DFA With Mixed-Mode Effects.
IEEE Trans. Neural Networks Learn. Syst., 2020

A Crossbar-Based In-Memory Computing Architecture.
IEEE Trans. Circuits Syst., 2020

Deep Neural Network Mapping and Performance Analysis on Tiled RRAM Architecture.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

Live Demonstration: Video-to-Spike Conversion Using a Real-Time Retina Cell Network Simulator.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

A Real-Time Retinomorphic Simulator Using a Conductance-Based Discrete Neuronal Network.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
Harnessing Intrinsic Noise in Memristor Hopfield Neural Networks for Combinatorial Optimization.
CoRR, 2019

2D materials in resistive memory and neuromorphic computing system applications.
Proceedings of the Device Research Conference, 2019

RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

Memristors and Memristive Devices for Neuromorphic Computing.
Proceedings of the Handbook of Memristor Networks., 2019

2018
Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing.
IEEE Trans. Multi Scale Comput. Syst., 2018

Neuromorphic computing with memristive devices.
Sci. China Inf. Sci., 2018

Feature extraction and analysis using memristor networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Hybrid neural network using binary RRAM devices.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Epsilon-greedy strategy for online dictionary learning with realistic memristor array constraints.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

2016
Feature Extraction Using Memristor Networks.
IEEE Trans. Neural Networks Learn. Syst., 2016

Periodic Orbits Analysis in a Class of Planar Liénard Systems with State-Triggered Jumps.
Int. J. Bifurc. Chaos, 2016

2015
FPAA/Memristor Hybrid Computing Infrastructure.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Low-Power Variation-Aware Adaptive Write Scheme for Access-Transistor-Free Memristive Memory.
ACM J. Emerg. Technol. Comput. Syst., 2015

Guest Editorial Solid-state Memristive Devices and Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Defect consideratons for robust sparse coding using memristor arrays.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Photoelectric characteristics of Schottky diode based on a Ge/Si core/shell nanowire.
Proceedings of the 9th International Conference on Sensing Technology, 2015

3D ReRAM with Field Assisted Super-Linear Threshold (FAST<sup>TM</sup>) Selector technology for super-dense, low power, low latency data storage systems.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
3D Vertical Dual-Layer Oxide Memristive Devices for Neuromorphic Computing.
CoRR, 2014

Pattern recognition with memristor networks.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Analog signal processing on a FPAA/memristor hybrid circuit.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Memristive devices for stochastic computing.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Stochastic Memristive Devices for Computing and Neuromorphic Applications
CoRR, 2013

2012
Memristive analog arithmetic within cellular arrays.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Time-dependency of the threshold voltage in memristive devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Two-terminal resistive switches (memristors) for memory and logic applications.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Si Memristive devices applied to memory and neuromorphic circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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