Junso Pak

According to our database, Junso Pak authored at least 6 papers between 2005 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Thermal Aware Design Methodologies for System On Chip Application Processor.

Youngsang Cho, Junso Pak, Seungwook Yoon, Ilryong Kim

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025

2011

Analysis of TSV-to-TSV coupling with high-impedance termination in 3D ICs.

Taigon Song, Chang Liu, Dae Hyun Kim, Sung Kyu Lim, Jonghyun Cho, Joohee Kim, Junso Pak, Seungyoung Ahn, Joungho Kim, Kihyun Yoon

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2008

Co-modeling, Experimental Verification, and Analysis of Chip-Package Hierarchical Power Distribution Network.

Hyunjeong Park, Hyungsoo Kim, Junso Pak, Changwook Yoon, Kyoungchoul Koo, Joungho Kim

IEICE Trans. Electron., 2008

Design of a Low-Noise UWB Transceiver SiP.

Changwook Yoon, Junwoo Lee, Young-Jin Park, Hyunjeong Park, Jaemin Kim, Junso Pak, Joungho Kim

IEEE Des. Test Comput., 2008

2006

Band-Stop Filter Effect of Power/Ground Plane on Through-Hole Signal Via in Multilayer PCB.

Junso Pak, Masahiro Aoyagi, Katsuya Kikuchi, Joungho Kim

IEICE Trans. Electron., 2006

2005

Noise generation, coupling, isolation, and EM radiation in high-speed package and PCB.

Joungho Kim, Junso Pak, Jongbae Park, Hyungsoo Kim

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005