Jyu-Yuan Lai

According to our database1, Jyu-Yuan Lai authored at least 8 papers between 2008 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2017
Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

2014
Methodology of exploring ESL/RTL many-core platforms for developing embedded parallel applications.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

2013
Design of high-throughput Inter-PE communication with application-level flow control protocol for many-core architectures.
Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013

2012
Design and analysis of a many-core processor architecture for multimedia applications.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2012

2011
Energy-Adaptive Dual-Field Processor for High-Performance Elliptic Curve Cryptographic Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2010
High-performance architecture for Elliptic Curve Cryptography over binary field.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Highly Efficient Cipher Processor for Dual-Field Elliptic Curve Cryptography.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

2008
Elixir: High-Throughput Cost-Effective Dual-Field Processors and the Design Framework for Elliptic Curve Cryptography.
IEEE Trans. Very Large Scale Integr. Syst., 2008


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