Kazusa Musha

According to our database, Kazusa Musha authored at least 5 papers between 2018 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2019

A Preliminary Evaluation of Building Block Computing Systems.

Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

A STDM (Static Time Division Multiplexing) Switch on a Multi-FPGA System.

Keita Azegami, Kazusa Musha, Kazuei Hironaka, Akram Ben Ahmed, Michihiro Koibuchi, Yao Hu, Hideharu Amano

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

The Evaluation of Partial Reconfiguration for a Multi-board FPGA System FiCSW.

Miho Yamakura, Kazuei Hironaka, Keita Azegami, Kazusa Musha, Hideharu Amano

Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

Implementing a large application(LSTM) on the multi-FPGA system: Flow-in-Cloud.

Yugo Yamauchi, Kazusa Musha, Hideharu Amano

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018

Deep Learning on High Performance FPGA Switching Boards: Flow-in-Cloud.

Kazusa Musha, Tomohiro Kudoh, Hideharu Amano

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018