Kentaro Shibahara

According to our database, Kentaro Shibahara authored at least 5 papers between 1992 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Gate-Extension Overlap Control by Sb Tilt Implantation.

Kentaro Shibahara, Nobuhide Maeda

IEICE Trans. Electron., 2007

1998

Reliable Threshold Voltage Determination for Sub-0.1µm Gate Length MOSFET's.

Morikazu Tsuno, Masato Suga, Masayasu Tanaka, Kentaro Shibahara, Mitiko Miura-Mattausch, Masataka Hirose

Proceedings of the ASP-DAC '98, 1998

1995

A 1-Gb DRAM for file applications.

Tadahiko Sugibayashi, Isao Naritake, Satoshi Utsugi, Kentaro Shibahara, Ryuichi Oikawa, Hidemitsu Mori, Shouichi Iwao, Tatsunori Murotani, Kuniaki Koyama, Shinichi Fukuzawa, Toshiro Itani, Kunihiko Kasama, Takashi Okuda, Shuichi Ohya, Masaki Ogawa

IEEE J. Solid State Circuits, November, 1995

1993

A 30-ns 256-Mb DRAM with a multidivided array structure.

Tadahiko Sugibayashi, Toshio Takeshima, Isao Naritake, Tatsuya Matano, Hiroshi Takada, Yoshiharu Aimoto, Koichiro Furuta, Mamoru Fujita, Takanori Saeki, Hiroshi Sugawara, Tatsunori Murotani, Naoki Kasai, Kentaro Shibahara, Ken Nakajima, Hiromitsu Hada, Takehiko Hamada, Naoaki Aizaki, Takemitsu Kunio, Eiichiro Kakehashi, Katsuhiro Masumori, Takaho Tanigawa

IEEE J. Solid State Circuits, November, 1993

1992

A 30-ns 64-Mb DRAM with built-in self-test and self-repair function.

Akira Tanabe, Toshio Takeshima, Hiroki Koike, Yoshiharu Aimoto, Masahide Takada, Toshiyuki Ishijima, Naoki Kasai, Hiromitsu Hada, Kentaro Shibahara, Takemitsu Kunio, Takaho Tanigawa, Takanori Saeki, Masato Sakao, Hidenobu Miyamoto, Hiroshi Nozue, Shuichi Ohya, Tatsunori Murotani, Kuniaki Koyama, Takashi Okuda

IEEE J. Solid State Circuits, November, 1992