Hiroshi Sugawara

According to our database1, Hiroshi Sugawara authored at least 11 papers between 1992 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 29-Gb/mm<sup>2</sup> 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology.
IEEE J. Solid State Circuits, January, 2026

2025

2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021

2020
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology.
IEEE J. Solid State Circuits, 2020

2019

2018

2014
Development of a Parallel Link Arm for Object Handling by Wheeled Mobile Robot.
Proceedings of the ICINCO 2014 - Proceedings of the 11th International Conference on Informatics in Control, Automation and Robotics, Volume 2, Vienna, Austria, 1, 2014

1996
A 98 mm<sup>2</sup> die size 3.3-V 64-Mb flash memory with FN-NOR type four-level cell.
IEEE J. Solid State Circuits, 1996

1993
A 30-ns 256-Mb DRAM with a multidivided array structure.
IEEE J. Solid State Circuits, November, 1993

1992
Clean room robot with non-contact joints using magnetic bearings.
Adv. Robotics, 1992


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