Akira Tanabe

According to our database, Akira Tanabe authored at least 11 papers between 1996 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Low-power embedded ReRAM technology for IoT applications.

Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi

Proceedings of the Symposium on VLSI Circuits, 2015

CIT Brains KidSize Robot: RoboCup 2015 KidSize League Winner.

Yasuo Hayashibara, Hideaki Minakata, Kiyoshi Irie, Daiki Maekawa, George Tsukioka, Yasufumi Suzuki, Taiitiro Mashiko, Yusuke Ito, Ryu Yamamoto, Masayuki Ando, Shouta Hirama, Yukari Suzuki, Chisato Kasebayashi, Akira Tanabe, Youta Seki, Moeno Masuda, Yuya Hirata, Yuuki Kanno, Tomotaka Suzuki, Joshua Supratman, Kosuke Machi, Shigechika Miki, Yoshitaka Nishizaki, Kenji Kanemasu, Hajime Sakamoto

Proceedings of the RoboCup 2015: Robot World Cup XIX [papers from the 19th Annual RoboCup International Symposium, 2015

2011

A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO.

Akira Tanabe, Ken'ichiro Hijioka, Hirokazu Nagase, Yoshihiro Hayashi

IEEE J. Solid State Circuits, 2011

2009

A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems.

Shunichi Kaeriyama, Yasushi Amamiya, Hidemi Noguchi, Zin Yamazaki, Tomoyuki Yamase, Ken'ichi Hosoya, Minoru Okamoto, Shiro Tomari, Hiroshi Yamaguchi, Hiroaki Shoda, Hironobu Ikeda, Shinji Tanaka, Tsugio Takahashi, Risato Ohhira, Arihide Noda, Ken'ichiro Hijioka, Akira Tanabe, Sadao Fujita, Nobuhiro Kawahara

IEEE J. Solid State Circuits, 2009

A 40Gb/s multi-data-rate CMOS transceiver chipset with SFI-5 interface for optical transmission systems.

Yasushi Amamiya, Shunichi Kaeriyama, Hidemi Noguchi, Zin Yamazaki, Tomoyuki Yamase, Ken'ichi Hosoya, Minoru Okamoto, Shiro Tomari, Hiroshi Yamaguchi, Hiroaki Shoda, Hironobu Ikeda, Shinji Tanaka, Tsugio Takahashi, Risato Ohhira, Arihide Noda, Ken'ichiro Hijioka, Akira Tanabe, Sadao Fujita, Nobuhiro Kawahara

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2006

A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model.

Akira Tanabe, Ken'ichiro Hijioka, Yoshihiro Hayashi

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2003

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC.

Akira Tanabe, Yasushi Nakahara, Akio Furukawa, Tohru Mogami

IEEE J. Solid State Circuits, 2003

2001

0.18- μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation.

Akira Tanabe, Masato Umetani, Ikuo Fujiwara, Takayuki Ogura, Kotaro Kataoka, Masao Okihara, Hiroshi Sakuraba, Tetsuo Endoh, Fujio Masuoka

IEEE J. Solid State Circuits, 2001

Beyond the red brick wall (panel): challenges and solutions in 50nm physical design.

Hidetoshi Onodera, Andrew B. Kahng, Wayne Wei-Ming Dai, Sani R. Nassif, Juho Kim, Akira Tanabe, Toshihiro Hattori

Proceedings of ASP-DAC 2001, 2001

1998

A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier.

Akira Tanabe, Masaaki Soda, Yasushi Nakahara, Takao Tamura, Kazuyoshi Yoshida, Akio Furukawa

IEEE J. Solid State Circuits, 1998

1996

2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology.

Masakazu Kurisu, Makoto Kaneko, Tetsuyuki Suzaki, Akira Tanabe, Mitsuhiro Togo, Akio Furukawa, Takao Tamura, Ken Nakajima, Kazuyoshi Yoshida

IEEE J. Solid State Circuits, 1996