Kimmo Kuusilinna

According to our database, Kimmo Kuusilinna authored at least 38 papers between 1999 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Towards real-time applications in mobile web browsers.

Eero Aho, Kimmo Kuusilinna, Tomi Aarnio, Janne Pietiainen, Jari Nikara

Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012

2009

A Configurable Motion Estimation Architecture for Block-Matching Algorithms.

Jarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen

IEEE Trans. Circuits Syst. Video Technol., 2009

Memory access characteristics of H.264 video encoder on embedded processor.

Eero Aho, Kimmo Kuusilinna, Jari Nikara

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Performance analysis of multi-channel memories in mobile devices.

Jari Nikara, Eero Aho, Petri A. Tuominen, Kimmo Kuusilinna

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

A case for multi-channel memories in video recording.

Eero Aho, Jari Nikara, Petri A. Tuominen, Kimmo Kuusilinna

Proceedings of the Design, Automation and Test in Europe, 2009

2008

A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms.

Jarno Vanne, Eero Aho, Timo D. Hämäläinen, Kimmo Kuusilinna

IEEE Trans. Circuits Syst. Video Technol., 2008

2007

Configurable implementation of parallel memory based real-time video downscaler.

Eero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna

Microprocess. Microsystems, 2007

Benchmarking mesh and hierarchical bus networks in system-on-chip context.

Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen

J. Syst. Archit., 2007

2006

HIBI Communication Network for System-on-Chip.

Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna

J. VLSI Signal Process., 2006

Scalable Architecture for SoC Video Encoders.

Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna

J. VLSI Signal Process., 2006

UML-based multiprocessor SoC design framework.

Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna

ACM Trans. Embed. Comput. Syst., 2006

A High-Performance Sum of Absolute Difference Implementation for Motion Estimation.

Jarno Vanne, Eero Aho, Timo Hämäläinen, Kimmo Kuusilinna

IEEE Trans. Circuits Syst. Video Technol., 2006

2005

Comments on "Winscale: an image-scaling algorithm using an area pixel Model".

Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen

IEEE Trans. Circuits Syst. Video Technol., 2005

Block-level parallel processing for scaling evenly divisible images.

Eero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Block-level parallel processing for scaling evenly divisible frames.

Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo Hämäläinen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Address Computation in Configurable Parallel Memory Architecture.

Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen

IEICE Trans. Inf. Syst., 2004

HIBI v.2 Communication Network for System-on-Chip.

Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the Computer Systems: Architectures, 2004

A Communication-Centric Design Flow for HIBI-Based SoCs.

Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the Computer Systems: Architectures, 2004

Comparison of hardware IP components for system-on-chip.

Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2004 International Symposium on System-on-Chip, 2004

Practical distributed simulation of a network of wireless terminals.

Jouni Riihimäki, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2004 International Symposium on System-on-Chip, 2004

Describing MIMO designs for rapid prototyping in the BEE environment.

Kimmo Kuusilinna, Chen Chang, Hans-Martin Blüthgen, Danijela Cabric, Brian C. Richards, Robert W. Brodersen

Proceedings of the 2004 12th European Signal Processing Conference, 2004

2003

Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications.

Kimmo Kuusilinna, Chen Chang, M. Josephine Ammer, Brian C. Richards, Robert W. Brodersen

EURASIP J. Adv. Signal Process., 2003

Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment.

Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic

Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003

Using a communication generator in SoC architecture exploration.

Tero Kangas, Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

Comparison of synthesized bus and crossbar interconnection architectures.

Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Implementation of BEE: a real-time large-scale hardware emulation engine.

Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Robert W. Brodersen

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Distributing SoC Simulations over a Network of Computers.

Jouni Riihimäki, Väinö Helminen, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002

Interconnection scheme for continuous-media systems-on-a-chip.

Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen

Microprocess. Microsystems, 2002

Configurable parallel memory architecture for multimedia computers.

Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti

J. Syst. Archit., 2002

Parameter optimization tool for enhancing on-chip network performance.

Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Optimizing finite state machines for system-on-chip communication.

Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

TDMA-based communication scheduling in system-on-chip video encoder.

Tero Kangas, Kimmo Kuusilinna, Timo Hämäläinen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Enhanced Configurable Parallel Memory Architecture.

Jarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001

Interfacing multiple processors in a system-on-chip video encoder.

Erno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Reuseable interface in multimedia hardware environment.

Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen, Tero Kangas, Jukka Saarinen

Proceedings of the 10th European Signal Processing Conference, 2000

1999

Field programmable gate array-based PCI interface for a coprocessor system.

Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen

Microprocess. Microsystems, 1999

Practical VHDL optimization for timing critical FPGA applications.

Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen

Microprocess. Microsystems, 1999

Reconfiguration Mechanism for an IP Block Based Interconnection.

Kimmo Kuusilinna, Pasi Liimatainen, Timo Hämäläinen, Jukka Saarinen

Proceedings of the 25th EUROMICRO '99 Conference, 1999