Koji Nakano

According to our database1, Koji Nakano authored at least 235 papers between 1992 and 2019.

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Bibliography

2019
Designing High-Performance Interconnection Networks with Host-Switch Graphs.
IEEE Trans. Parallel Distrib. Syst., 2019

2018
Almost optimal column-wise prefix-sum computation on the GPU.
The Journal of Supercomputing, 2018

Preface: Special issue on the Fifth International Symposium on Computing and Networking.
IJNC, 2018

Introduction to APDCM 2018.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

An Optimal Parallel Algorithm for Computing the Summed Area Table on the GPU.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Efficient Byte Stream Pattern Test using Bloom Filter with Rolling Hash Functions on the FPGA.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018

A Prefix-Sum-Based Rabin-Karp Implementation for Multiple Pattern Matching on GPGPU.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018

Tile Art Image Generation Using Conditional Generative Adversarial Networks.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018

2017
An Efficient GPU Implementation of Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices.
IJNC, 2017

Preface: Special Issue on the Fourth International Symposium on Computing and Networking.
IJNC, 2017

GPU-accelerated Exhaustive Verification of the Collatz Conjecture.
IJNC, 2017

An Efficient GPU Implementation of CKY Parsing Using the Bitwise Parallel Bulk Computation Technique.
IEICE Transactions, 2017

C2CU: a CUDA C program generator for bulk execution of a sequential algorithm.
Concurrency and Computation: Practice and Experience, 2017

Accelerating digital halftoning using the local exhaustive search on the GPU.
Concurrency and Computation: Practice and Experience, 2017

Adaptive loss-less data compression method optimized for GPU decompression.
Concurrency and Computation: Practice and Experience, 2017

Algorithms and applications towards the convergence of high-end data-intensive and computing systems.
Concurrency and Computation: Practice and Experience, 2017

A GPU Implementation of Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation.
Proceedings of the Parallel Processing and Applied Mathematics, 2017

Almost Optimal Column-wise Prefix-sum Computation on the GPU.
Proceedings of the Parallel Processing and Applied Mathematics, 2017

Photomosaic Generation by Rearranging Subimages, with GPU Acceleration.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Accelerating the Smith-Waterman Algorithm Using Bitwise Parallel Bulk Computation Technique on GPU.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Introduction to APDCM Workshop.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Order/Radix Problem: Towards Low End-to-End Latency Interconnection Networks.
Proceedings of the 46th International Conference on Parallel Processing, 2017

Simple and Fast Parallel Algorithms for the Voronoi Map and the Euclidean Distance Map, with GPU Implementations.
Proceedings of the 46th International Conference on Parallel Processing, 2017

A Hybrid Architecture for the Approximate String Matching on an FPGA.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017

A Square Pointillism Image Generation, and Its GPU Acceleration.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017

Single Kernel Soft Synchronization Technique for Task Arrays on CUDA-enabled GPUs, with Applications.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017

2016
A character art generator using the local exhaustive search, with GPU acceleration.
IJPEDS, 2016

Efficient Implementation of FDFM Approach for Euclidean Algorithms on the FPGA.
IJNC, 2016

Preface: Special issue on the Third International Symposium on Computing and Networking.
IJNC, 2016

Bulk execution of Euclidean algorithms on the CUDA-enabled GPU.
IJNC, 2016

Fast Simulation of Conway's Game of Life Using Bitwise Parallel Bulk Computation on a GPU.
Int. J. Found. Comput. Sci., 2016

A Memory-Access-Efficient Implementation for Computing the Approximate String Matching Algorithm on GPUs.
IEICE Transactions, 2016

An FPGA Implementation for a Flexible-Length-Arithmetic Processor Employing the FDFM Processor Core Approach.
IEICE Transactions, 2016

GPU-Accelerated Bulk Execution of Multiple-Length Multiplication with Warp-Synchronous Programming Technique.
IEICE Transactions, 2016

Fully Parallelized LZW Decompression for CUDA-Enabled GPUs.
IEICE Transactions, 2016

An Efficient Implementation of LZW Decompression in the FPGA.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

APDCM Introduction and Committees.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Bitwise Parallel Bulk Computation on the GPU, with Application to the CKY Parsing for Context-Free Grammars.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Randomly Optimized Grid Graph for Low-Latency Interconnection Networks.
Proceedings of the 45th International Conference on Parallel Processing, 2016

An Efficient Implementation of LZW Compression in the FPGA.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2016

Light Loss-Less Data Compression, with GPU Implementation.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2016

Deterministic Construction of Regular Geometric Graphs with Short Average Distance and Limited Edge Length.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2016

GPU-Accelerated Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A Memory-Access-Efficient Implementation of the Approximate String Matching Algorithm on GPU.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

Accelerating Ant Colony Optimization for the Vertex Coloring Problem on the GPU.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A Hardware Sorter for Almost Sorted Sequences, with FPGA Implementations.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

2015
Preface: Special Issue on the Second International Symposium on Computing and Networking.
IJNC, 2015

Using Pulse/Tone Signals as an Alternative to Boost Channel Reservation on Directional Communications.
IEICE Transactions, 2015

Parallel FDFM Approach for Computing GCDs Using the FPGA.
Proceedings of the Parallel Processing and Applied Mathematics, 2015

A Parallel Algorithm for LZW Decompression, with GPU Implementation.
Proceedings of the Parallel Processing and Applied Mathematics, 2015

Optimality of Fundamental Parallel Algorithms on the Hierarchical Memory Machine, with GPU Implementation.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations.
Proceedings of the 14th International Symposium on Parallel and Distributed Computing, 2015

GPU-Accelerated Digital Halftoning by the Local Exhaustive Search.
Proceedings of the 14th International Symposium on Parallel and Distributed Computing, 2015

APDCM Introduction and Committees.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Bulk GCD Computation Using a GPU to Break Weak RSA Keys.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Asterisk PBX Capacity Evaluation.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

A Fast Approximate String Matching Algorithm on GPU.
Proceedings of the Third International Symposium on Computing and Networking, 2015

A Flexible-Length-Arithmetic Processor Based on FDFM Approach in FPGAs.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Parallelization Techniques for Error Diffusion with GPU Implementations.
Proceedings of the Third International Symposium on Computing and Networking, 2015

A Warp-Synchronous Implementation for Multiple-Length Multiplication on the GPU.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Fast LZW Compression Using a GPU.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Efficient GPU Implementations for the Conway's Game of Life.
Proceedings of the Third International Symposium on Computing and Networking, 2015

2014
Accelerating ant colony optimisation for the travelling salesman problem on the GPU.
IJPEDS, 2014

Optimal implementations of the approximate string matching and the approximate discrete signal matching on the memory machine models.
IJPEDS, 2014

Implementations of the Hough Transform on the Embedded Multicore Processors.
IJNC, 2014

Preface.
IJNC, 2014

An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU.
IEICE Transactions, 2014

Offline Permutation on the CUDA-enabled GPU.
IEICE Transactions, 2014

An Efficient Implementation of the Gradient-Based Hough Transform Using DSP Slices and Block RAMs on the FPGA.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Bulk Execution of Oblivious Algorithms on the Unified Memory Machine, with GPU Implementation.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Random Address Permute-Shift Technique for the Shared Memory on GPUs.
Proceedings of the 43rd International Conference on Parallel Processing Workshops, 2014

Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations.
Proceedings of the 43rd International Conference on Parallel Processing, 2014

C2CU : A CUDA C Program Generator for Bulk Execution of a Sequential Algorithm.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

A GPU Implementation of Clipping-Free Halftoning Using the Direct Binary Search.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

GPU-Accelerated Verification of the Collatz Conjecture.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Thorough Evaluation of GPU Shared Memory Load and Store Instructions.
Proceedings of the Second International Symposium on Computing and Networking, 2014

A Time Optimal Parallel Algorithm for the Dynamic Programming on the Hierarchical Memory Machine.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Theoretical Parallel Computing Models for GPU Computing.
Proceedings of the Open Problems in Mathematics and Computational Science, 2014

2013
Accelerating computation of Euclidean distance map using the GPU with efficient memory access.
IJPEDS, 2013

An FPGA implementation for neural networks with the FDFM processor core approach.
IJPEDS, 2013

Optimal Parallel Algorithms for Computing the Sum, the Prefix-Sums, and the Summed Area Table on the Memory Machine Models.
IEICE Transactions, 2013

Offline Permutation Algorithms on the Discrete Memory Machine with Performance Evaluation on the GPU.
IEICE Transactions, 2013

A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation.
IEICE Transactions, 2013

Efficient Hough Transform on the FPGA using DSP Slices and Block RAMs.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

The Hierarchical Memory Machine Model for GPUs.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

An Optimal Offline Permutation Algorithm on the Hierarchical Memory Machine, with the GPU Implementation.
Proceedings of the 42nd International Conference on Parallel Processing, 2013

ASCII Art Generation Using the Local Exhaustive Search on the GPU.
Proceedings of the First International Symposium on Computing and Networking, 2013

The Random Address Shift to Reduce the Memory Access Congestion on the Discrete Memory Machine.
Proceedings of the First International Symposium on Computing and Networking, 2013

Sequential Memory Access on the Unified Memory Machine with Application to the Dynamic Programming.
Proceedings of the First International Symposium on Computing and Networking, 2013

TinyCSE: Tiny Computer System for Education.
Proceedings of the First International Symposium on Computing and Networking, 2013

A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs.
Proceedings of the First International Symposium on Computing and Networking, 2013

Template Matching Using DSP Slices on the FPGA.
Proceedings of the First International Symposium on Computing and Networking, 2013

The super warp architecture with random address shift.
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

2012
Preface.
IJNC, 2012

A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles.
IJNC, 2012

The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption.
IJNC, 2012

Preface.
Int. J. Found. Comput. Sci., 2012

Simple Memory Machine Models for GPUs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Accelerating the Dynamic Programming for the Optimal Polygon Triangulation on the GPU.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

An Optimal Parallel Prefix-Sums Algorithm on the Memory Machine Models for GPUs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

An Efficient GPU Implementation of Ant Colony Optimization for the Traveling Salesman Problem.
Proceedings of the Third International Conference on Networking and Computing, 2012

Efficient Implementations of the Approximate String Matching on the Memory Machine Models.
Proceedings of the Third International Conference on Networking and Computing, 2012

Asynchronous Memory Machine Models with Barrier Synchronization.
Proceedings of the Third International Conference on Networking and Computing, 2012

An Implementation of Conflict-Free Offline Permutation on the GPU.
Proceedings of the Third International Conference on Networking and Computing, 2012

2011
Implementations of a Parallel Algorithm for Computing Euclidean Distance Map in Multicore Processors and GPUs.
IJNC, 2011

Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs.
IJNC, 2011

Preface.
Int. J. Found. Comput. Sci., 2011

Preface.
Int. J. Found. Comput. Sci., 2011

A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones.
IEICE Transactions, 2011

CRT-Based DSP Decryption Using Montgomery Modular Multiplication on the FPGA.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Fast and Accurate Template Matching Using Pixel Rearrangement on the GPU.
Proceedings of the Second International Conference on Networking and Computing, 2011

Accelerating the Dynamic Programming for the Matrix Chain Product on the GPU.
Proceedings of the Second International Conference on Networking and Computing, 2011

An Algorithm to Remove Asynchronous ROMs in Circuits with Cycles.
Proceedings of the Second International Conference on Networking and Computing, 2011

A GPU Implementation of Computing Euclidean Distance Map with Efficient Memory Access.
Proceedings of the Second International Conference on Networking and Computing, 2011

Fast Ellipse Detection Algorithm Using Hough Transform on the GPU.
Proceedings of the Second International Conference on Networking and Computing, 2011

The Parallel FDFM Processor Core Approach for Neural Networks.
Proceedings of the Second International Conference on Networking and Computing, 2011

2010
Halftoning via Error Diffusion using Circular Dot-overlap Model.
JDCTA, 2010

Low-Latency Connected Component Labeling Using an FPGA.
Int. J. Found. Comput. Sci., 2010

Preface.
Int. J. Found. Comput. Sci., 2010

Deafness Resilient MAC Protocol for Directional Communications.
IEICE Transactions, 2010

Efficient exhaustive verification of the Collatz conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA.
Proceedings of the First International Conference on Networking and Computing, 2010

Efficient Canny Edge Detection Using a GPU.
Proceedings of the First International Conference on Networking and Computing, 2010

A Rewriting Algorithm to Generate AROM-free Fully Synchronous Circuits.
Proceedings of the First International Conference on Networking and Computing, 2010

Implementations of Parallel Computation of Euclidean Distance Map in Multicore Processors and GPUs.
Proceedings of the First International Conference on Networking and Computing, 2010

A Perspective on the Experiential Learning of Computer Architecture.
Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010

2009
Special issue on Advances in Parallel and Distributed Computational Models.
IJPEDS, 2009

Clipping-Free Halftoning and Multitoning Using the Direct Binary Search.
IEICE Transactions, 2009

A Simple Parallel Convex Hulls Algorithm for Sorted Points and the Performance Evaluation on the Multicore Processors.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

An Efficient Parallel Sorting Compatible with the Standard qsort.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2009

RSA encryption and decryption using the redundant number system on the FPGA.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

A distributed approach for the problem of routing and wavelength assignment in WDM networks.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

2008
A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration.
Int. J. Found. Comput. Sci., 2008

Preface.
Int. J. Found. Comput. Sci., 2008

Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs.
Proceedings of the Ninth International Conference on Parallel and Distributed Computing, 2008

Optimized Component Labeling Algorithm for Using in Medium Sized FPGAs.
Proceedings of the Ninth International Conference on Parallel and Distributed Computing, 2008

Component labeling for k-concave binary images using an FPGA.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Processor, Assembler, and Compiler Design Education Using an FPGA.
Proceedings of the 14th International Conference on Parallel and Distributed Systems, 2008

Accelerating Montgomery Modulo Multiplication for Redundant Radix-64k Number System on the FPGA Using Dual-Port Block RAMs.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

A Tiny Processing System for Education and Small Embedded Systems on the FPGAs.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

MAC Layer Misbehavior on Ad Hoc Networks.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

The Impact of Backup Routes on the Routing and Wavelength Assignment Problem in WDM Networks.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

An Error Diffusion Based Algorithm for Hiding an Image in Distinct Two Images.
Proceedings of the International Conference on Computer Science and Software Engineering, 2008

2007
Fundamental Algorithms on the Reconfigurable Mesh.
Proceedings of the Handbook of Parallel Computing - Models, Algorithms and Applications., 2007

Efficient Hardware Algorithms for n Choose k Counters Using the Bitonic Merger.
Int. J. Found. Comput. Sci., 2007

Preface.
Int. J. Found. Comput. Sci., 2007

Special Section on Parallel/Distributed Processing and Systems.
IEICE Transactions, 2007

Randomized Initialization on the 1-Dimensional Reconfigurable Mesh.
Proceedings of the Eighth International Conference on Parallel and Distributed Computing, 2007

Proteus: An Architecture for Adapting Web Page on Small-Screen Devices.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2007

Cluster-dot Screening by Local Exhaustive Search with Hardware Accelaration.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
Preface.
Int. J. Found. Comput. Sci., 2006

Special Section on Challenges in Ad-hoc and Multi-hop Wireless Communications.
IEICE Transactions, 2006

An Energy Efficient Ranking Protocol for Radio Networks.
IEICE Transactions, 2006

An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver.
IEICE Transactions, 2006

Randomized Leader Election Protocols in Noisy Radio Networks with a Single Transceiver.
Proceedings of the Parallel and Distributed Processing and Applications, 2006

Limiting the Effects of Deafness and Hidden Terminal Problems in Directional Communications.
Proceedings of the Parallel and Distributed Processing and Applications, 2006

Efficient hardware algorithms for n choose k counters.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
Foreword.
Int. J. Found. Comput. Sci., 2005

Foreword.
Int. J. Found. Comput. Sci., 2005

Hardware n Choose k Counters with Applications to the Partial Exhaustive Search.
IEICE Transactions, 2005

Adaptive Carrier Sensing and Packet Sending - An Alternative to Boost the Performance in Directional Communications.
Proceedings of the Sixth International Conference on Parallel and Distributed Computing, 2005

2004
Preface.
Int. J. Found. Comput. Sci., 2004

Time And Energy Optimal List Ranking Algorithms On The K-Channel Broadcast Communication Model With No Collision Detection.
Int. J. Found. Comput. Sci., 2004

Instance-Specific Solutions For Accelerating The Cky Parsing Of Large Context-Free Grammars.
Int. J. Found. Comput. Sci., 2004

Foreword.
IEICE Transactions, 2004

Foreword.
IEICE Transactions, 2004

FM Screening by the Local Exhaustive Search, with Hardware Acceleration.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

2003
An Efficient Parallel Prefix Sums Architecture with Domino Logic.
IEEE Trans. Parallel Distrib. Syst., 2003

The LD and DLAD Bio-Operations on Formal Languages.
Journal of Automata, Languages and Combinatorics, 2003

Linear Layout of Generalized Hypercubes.
Int. J. Found. Comput. Sci., 2003

Instance-Specific Solutions to Accelerate the CKY Parsing.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

An image retrieval system using FPGAs.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
An Algorithm Visualization Tool on the Reconfigurable Mesh.
VLSI Design, 2002

Guest Editors' Introduction to Special Section on Mobile Computing and Wireless Networks.
IEEE Trans. Parallel Distrib. Syst., 2002

Energy-Efficient Routing in the Broadcast Communication Model.
IEEE Trans. Parallel Distrib. Syst., 2002

Uniform Leader Election Protocols for Radio Networks.
IEEE Trans. Parallel Distrib. Syst., 2002

Identifying Faulty Nodes in Wireless Sensor Networks.
Journal of Interconnection Networks, 2002

A Survey on Leader Election Protocols for Radio Networks.
Proceedings of the International Symposium on Parallel Architectures, 2002

Sorting on Single-Channel Wireless Sensor Networks.
Proceedings of the International Symposium on Parallel Architectures, 2002

Workshop Introduction.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Doubly-Logarithmic Energy-Efficient Initialization Protocols for Single-Hop Radio Networks.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

An Optimal Randomized Ranking Algorithm on the k-channel Broadcast Communication Model.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

Accelerating the CKY Parsing Using FPGAs.
Proceedings of the High Performance Computing, 2002

Time and Energy Optimal List Ranking Algorithms on the k -Channel Broadcast Communication Model.
Proceedings of the Computing and Combinatorics, 8th Annual International Conference, 2002

2001
Energy-Efficient Permutation Routing in Radio Networks.
IEEE Trans. Parallel Distrib. Syst., 2001

Optimal Algorithms for the Multiple Query Problem on Reconfigurable Meshes, with Applications.
IEEE Trans. Parallel Distrib. Syst., 2001

Fundamental Protocols on Wireless Sensor Networks.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

An Energy-Efficient Initialization Protocol for Wireless Sensor Networks.
Proceedings of the 30th International Workshops on Parallel Processing (ICPP 2001 Workshops), 2001

Uniform Leader Election Protocols in Radio Networks.
Proceedings of the 2001 International Conference on Parallel Processing, 2001

2000
Energy-Efficient Initialization Protocols for Single-Hop Radio Networks with No Collision Detection.
IEEE Trans. Parallel Distrib. Syst., 2000

Randomized Initialization Protocols for Ad Hoc Networks.
IEEE Trans. Parallel Distrib. Syst., 2000

A randomized leader election protocol for ad-hoc networks.
Proceedings of the SIROCCO 7, 2000

Randomized Leader Election Protocols in Radio Networks with No Collision Detection.
Proceedings of the Algorithms and Computation, 11th International Conference, 2000

Workshop on Advances in Parallel and Distributed Computational Models.
Proceedings of the Parallel and Distributed Processing, 2000

Multithreaded Parallel Computer Model with Performance Evaluation.
Proceedings of the Parallel and Distributed Processing, 2000

Energy-Efficient Deterministic Routing Protocols in Radio Networks.
Proceedings of the 2000 International Conference on Parallel Processing, 2000

Energy-Efficient Initialization Protocols for Radio Networks with No Collision Detection.
Proceedings of the 2000 International Conference on Parallel Processing, 2000

Energy-efficient randomized routing in radio networks.
Proceedings of the 4th International Workshop on Discrete Algorithms and Methods for Mobile Computing and Communications (DIAL-M 2000), 2000

1999
Broadcast-Efficient Protocols for Mobile Radio Networks.
IEEE Trans. Parallel Distrib. Syst., 1999

Guest Editors' Introduction.
Int. J. Found. Comput. Sci., 1999

A Tool for Algorithm Visualization on the Reconfigurable Mesh.
Proceedings of the 1999 International Symposium on Parallel Architectures, 1999

Energy-Efficient Initialization Protocols for Ad-hoc Radio Networks.
Proceedings of the Algorithms and Computation, 10th International Symposium, 1999

A Time-Optimal Solution for the Path Cover Problem on Cographs.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

An Efficient VLSI Architecture Parallel Prefix Counting With Domino Logic.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

Scalable Hardware-Algorithms for Binary Prefix Sums.
Proceedings of the Parallel and Distributed Processing, 1999

Randomized Initialization Protocols for Packet Radio Networks.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

Randomized initialization protocols for packet radio networks.
Proceedings of the Mobile Networks and Computing, 1999

1998
An Efficient Algorithm for Row Minima Computations on Basic Reconfigurable Meshes.
IEEE Trans. Parallel Distrib. Syst., 1998

An O((log log n)2) Time Algorithm to Compute the Convex Hull of Sorted Points on Reconfigurable Meshes.
IEEE Trans. Parallel Distrib. Syst., 1998

Optimal Parallel Algorithms for Finding Proximate Points, with Applications.
IEEE Trans. Parallel Distrib. Syst., 1998

Integer Summing Algorithms on Reconfigurable Meshes.
Theor. Comput. Sci., 1998

Efficient List Ranking on the Reconfigurable Mesh with Applications.
Theory Comput. Syst., 1998

Randomized O (log log n)-Round Leader Election Protocols in Packet Radio Networks.
Proceedings of the Algorithms and Computation, 9th International Symposium, 1998

Broadcast-Efficient Algorithms on the Coarse-Grain Broadcast Communication Model with Few Channels.
IPPS/SPDP, 1998

A Scalable VLSI Architecture for Binary Prefix Sums.
IPPS/SPDP, 1998

An O((log log n)2) Time Convex Hull Algorithm on Reconfigurable Meshes.
IPPS/SPDP, 1998

1997
An Optimal Algorithm for the Angle-Restricted All Nearest Neighbor Problem on the Reconfigurable Mesh, with Applications.
IEEE Trans. Parallel Distrib. Syst., 1997

An Approximation Algorithm for the Minimum Common Supertree Problem.
Nord. J. Comput., 1997

Optimal Parallel Algorithms for Finding Proximate Points, with Applications (Extended Abstract).
Proceedings of the Algorithms and Data Structures, 5th International Workshop, 1997

Weighted and Unweighted Selection Algorithms for k Sorted Sequences.
Proceedings of the Algorithms and Computation, 8th International Symposium, 1997

Work-Time Optimal K-Merge Algorithms on the PRAM.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Broadcast-Efficient Sorting in the Presence of Few Channels.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

1996
Computation of the Convex Hull for Sorted Points on a Reconfigurable Mesh.
Parallel Algorithms Appl., 1996

Efficient List Ranking on the Reconfigurable Mesh, with Applications.
Proceedings of the Algorithms and Computation, 7th International Symposium, 1996

An Optimal Algorithm for the Angle-Restricted All Nearest Neighbor Problem on the Reconfigurable.
Proceedings of IPPS '96, 1996

An Efficient Algorithm for Row Minima Computations in Monotone Matrices.
Proceedings of the 1996 International Conference on Parallel Processing, 1996

1995
A Bibliography of Published Papers on Dynamically Reconfigurable Architectures.
Parallel Processing Letters, 1995

Prefix-Sums Algorithms on Reconfigurable Meshes.
Parallel Processing Letters, 1995

Optimal Initializing Algorithms for a Reconfigurable Mesh.
J. Parallel Distrib. Comput., 1995

1993
An optimal parallel algorithm for finding shortest paths inside simple polygons.
Systems and Computers in Japan, 1993

Linear Layouts of Generalized Hypercubes.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 1993

1992
Simple parallel algorithms to compute interval maxima.
Systems and Computers in Japan, 1992

Methods for realizing a priority bus system.
Systems and Computers in Japan, 1992


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