Oliver Reiche

According to our database, Oliver Reiche authored at least 24 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Efficient parallel reduction on GPUs with Hipacc.

Bo Qiao, Oliver Reiche, M. Akif Özkan, Jürgen Teich, Frank Hannig

Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020

Unveiling kernel concurrency in multiresolution filters on GPUs with an image processing DSL.

Bo Qiao, Oliver Reiche, Jürgen Teich, Frank Hannig

Proceedings of the GPGPU@PPoPP '20: 13th Annual Workshop on General Purpose Processing using Graphics Processing Unit colocated with 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2020

2019

From Loop Fusion to Kernel Fusion: A Domain-Specific Approach to Locality Optimization.

Bo Qiao, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

2018

A Domain-Specific Language Approach for Designing and Programming Heterogeneous Image Systems.

Oliver Reiche

PhD thesis, 2018

Loop Parallelization Techniques for FPGA Accelerator Synthesis.

Oliver Reiche, M. Akif Ozkan, Frank Hannig, Jürgen Teich, Moritz Schmid

J. Signal Process. Syst., 2018

Automatic Kernel Fusion for Image Processing DSLs.

Bo Qiao, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, 2018

2017

Auto-vectorization for image processing DSLs.

Oliver Reiche, Christof Kobylko, Frank Hannig, Jürgen Teich

Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Generating FPGA-based image processing accelerators with Hipacc: (Invited paper).

Oliver Reiche, M. Akif Ozkan, Richard Membarth, Jürgen Teich, Frank Hannig

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Hardware design and analysis of efficient loop coarsening and border handling for image processing.

M. Akif Ozkan, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2016

HIPA^cc: A Domain-Specific Language and Compiler for Image Processing.

Richard Membarth, Oliver Reiche, Frank Hannig, Jürgen Teich, Mario Körner, Wieland Eckert

IEEE Trans. Parallel Distributed Syst., 2016

Hybrid code description for developing fast and resource efficient image processing architectures.

Konrad Häublein, Marc Reichenbach, Oliver Reiche, M. Akif Ozkan, Dietmar Fey, Frank Hannig, Jürgen Teich

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Modeling, programming and performance analysis of automotive environment map representations on embedded GPUs.

Jörg Fickenscher, Oliver Reiche, Jens Schlumberger, Frank Hannig, Jürgen Teich

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2016

FPGA-based accelerator design from a domain-specific language.

M. Akif Ozkan, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

A High-Performance Image Processing DSL for Heterogeneous Architectures.

Kai Selgrad, Alexander Lier, Jan Dörntlein, Oliver Reiche, Marc Stamminger

Proceedings of the 9th European Lisp Symposium (ELS 2016), Kraków, Poland, May 9-10, 2016., 2016

HIPA^cc.

Moritz Schmid, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the FPGAs for Software Programmers, 2016

2015

Synthesis and optimization of image processing accelerators using domain knowledge.

Oliver Reiche, Konrad Häublein, Marc Reichenbach, Moritz Schmid, Frank Hannig, Jürgen Teich, Dietmar Fey

J. Syst. Archit., 2015

Automatic Optimization of Hardware Accelerators for Image Processing.

Oliver Reiche, Konrad Häublein, Marc Reichenbach, Frank Hannig, Jürgen Teich, Dietmar Fey

CoRR, 2015

Loop coarsening in C-based High-Level Synthesis.

Moritz Schmid, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014

Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach.

Frank Hannig, Vahid Lari, Srinivas Boppu, Alexandru Tanase, Oliver Reiche

ACM Trans. Embed. Comput. Syst., 2014

Towards a performance-portable description of geometric multigrid algorithms using a domain-specific language.

Richard Membarth, Oliver Reiche, Christian Schmitt, Frank Hannig, Jürgen Teich, Markus Stürmer, Harald Köstler

J. Parallel Distributed Comput., 2014

Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs.

Moritz Schmid, Oliver Reiche, Christian Schmitt, Frank Hannig, Jürgen Teich

CoRR, 2014

Consistent Programming Models and Tools for Designing Heterogeneous Image Systems.

Oliver Reiche

Proceedings of the 8th Joint Workshop of the German Research Training Groups in Computer Science, 2014

Code generation for embedded heterogeneous architectures on android.

Richard Membarth, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Code generation from a domain-specific language for C-based HLS of hardware accelerators.

Oliver Reiche, Moritz Schmid, Frank Hannig, Richard Membarth, Jürgen Teich

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014