Kwunhang Wong

Orcid: 0009-0004-5195-2527

According to our database1, Kwunhang Wong authored at least 8 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Towards Secure and Efficient DNN Accelerators via Hardware-Software Co-Design.
CoRR, February, 2026

Resistive Memory based Efficient Machine Unlearning and Continual Learning.
CoRR, January, 2026

2025
Resistive memory-based zero-shot liquid state machine for multimodal event data learning.
Nat. Comput. Sci., January, 2025

When Pipelined In-Memory Accelerators Meet Spiking Direct Feedback Alignment: A Co-Design for Neuromorphic Edge Computing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Re<sup>4</sup>PUF: A Reliable, Reconfigurable ReRAM-based PUF Resilient to DNN and Side Channel Attacks.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of Deep Neural Networks.
CoRR, 2024

SNNGX: Securing Spiking Neural Networks with Genetic XOR Encryption on RRAM-based Neuromorphic Accelerator.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of DNNs.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024


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