Lei Zhou

Orcid: 0000-0001-7272-9093

Affiliations:
  • Acela Microelectronics Company Ltd., Suzhou, China
  • Chinese Academy of Science (CAS), Institute of Microelectronics, Beijing, China


According to our database1, Lei Zhou authored at least 19 papers between 2014 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2025
A 25-GS/s 8-bit Current-Steering DAC With ADC-Based Duty-Cycle Detection in 40-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025

A dither-based background calibration circuit for pipelined ADCs in 40 nm CMOS.
IEICE Electron. Express, 2025

2024
A 16-Bit 5 GS/s DAC With Redundant-MSB-Based Digital Pre-Distortion Achieving SFDR >61 dBc Up to 2.4 GHz in 40-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024

2021
A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS.
Proceedings of the 47th ESSCIRC 2021, 2021

A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators.
IEEE J. Solid State Circuits, 2020

A 50-112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS.
IEEE J. Solid State Circuits, 2020

100 Gb/s (4 × 25 Gb/s) real-time coherent UDWDM-PON with a large power budget.
JOCN, 2020

2019
An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm.
IEICE Electron. Express, 2019

A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS.
IEICE Electron. Express, 2019

Demonstration of Bidirectional Real-Time 100 Gb/s (4×25 Gb/s) Coherent UDWDM-PON with Power Budget of 44 dB.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2017
A 400-MS/s 10-b 8 interleaved SAR ADC in 0.13 um CMOS.
IEICE Electron. Express, 2017

A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration.
IEICE Electron. Express, 2017

A four-channel time-interleaved 30-GS/s 6-bit ADC in 0.18 μm SiGe BiCMOS technology.
Sci. China Inf. Sci., 2017

2016
A 30Gsps 6bit DAC in SiGe BiCMOS technology.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2014
A 4-GS/s 8-bit two-channel time-interleaved folding and interpolating ADC.
Sci. China Inf. Sci., 2014


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