Lester Kalms

Orcid: 0000-0003-0638-0510

According to our database1, Lester Kalms authored at least 23 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Flexible Mixed-Mesh FPGA Cluster Architecture for High Speed Computing.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024

2023
Methods and Algorithms for Efficient Programming of FPGA-based Heterogeneous Systems for Object Detection.
PhD thesis, 2023

EuFRATE: European FPGA Radiation-hardened Architecture for Telecommunications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

ArcvaVX: OpenVX Framework for Adaptive Reconfigurable Computer Vision Architectures.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
A cross-platform OpenVX library for FPGA accelerators.
J. Syst. Archit., 2022

DECISION: Distributing OpenVX Applications on CPUs, GPUs and FPGAs using OpenCL.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

High-Performance AKAZE Implementation Including Parametrizable and Generic HLS Modules.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

2021
A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs.
J. Signal Process. Syst., 2021

2020
Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
Scalable clustering and mapping algorithm for application distribution on heterogeneous and irregular FPGA clusters.
J. Parallel Distributed Comput., 2019

Hardware/Software-Codesign for Hand Gestures Recognition using a Convolutional Neural Network.
Proceedings of the INTESA 2019 Proceedings, 2019

Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint FPGA Implementation.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
Full-HD Accelerated and Embedded Feature Detection Video System with 63fps using ORB for FREAK.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Automatic OpenCL Code Generation from LLVM-IR using Polyhedral Optimization.
Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

Low Power Image Processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

Supporting Utilities for Heterogeneous Embedded Image Processing Platforms (STHEM): An Overview.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Accelerated Embedded AKAZE Feature Detection Algorithm on FPGA.
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

Exploration of OpenCL for FPGAs using SDAccel and comparison to GPUs and multicore CPUs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Robust lane recognition for autonomous driving.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
TULIPP: Towards ubiquitous low-power image processing platforms.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Clustering and Mapping Algorithm for Application Distribution on a Scalable FPGA Cluster.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

FPGA based hardware accelerator for KAZE feature extraction algorithm.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016


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