Lisa R. Hsu
According to our database1, Lisa R. Hsu authored at least 7 papers between 2005 and 2014.
Legend:Book In proceedings Article PhD thesis Other
A Case for a Flexible Scalar Unit in SIMT Architecture.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014
Exploiting uniform vector instructions for GPGPU performance, energy efficiency, and opportunistic reliability enhancement.
Proceedings of the International Conference on Supercomputing, 2013
QoS policies and architecture for cache/memory in CMP platforms.
Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2007
The M5 Simulator: Modeling Networked Systems.
IEEE Micro, 2006
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource.
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006
Exploring the cache design space for large scale CMPs.
SIGARCH Computer Architecture News, 2005
Performance Analysis of System Overheads in TCP/IP Workloads.
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005