Luca Stornaiuolo

According to our database1, Luca Stornaiuolo authored at least 20 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Hardware/software co-design for scientific computing and convolutional neural networks on FPGA-based embedded architectures.
PhD thesis, 2021

FPGA-based implementation of 2D Normalized Cross-Correlation for Large Scale Signals.
Proceedings of the 6th IEEE International Forum on Research and Technology for Society and Industry, 2021

Plaster: an Embedded FPGA-based Cluster Orchestrator for Accelerated Distributed Algorithms.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

2020
Enabling transparent hardware acceleration on Zynq SoC for scientific computing.
SIGBED Rev., 2020

EMPhASIS: An EMbedded Public Attention Stress Identification System.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Hardware resources analysis of BNNs splitting for FARD-based multi-FPGAs Distributed Systems.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

3D Topology Transformation with Generative Adversarial Networks.
Proceedings of the Eleventh International Conference on Computational Creativity, 2020

BNNsplit: Binarized Neural Networks for embedded distributed FPGA-based computing systems.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
FPGA-Based Embedded System Implementation of Audio Signal Alignment.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Pareto Optimal Design Space Exploration for Accelerated CNN on FPGA.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

A Case Study for an Accelerated DCNN on FPGA-Based Embedded Distributed System.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2018
HLS Support for Polymorphic Parallel Memories.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS.
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

EXTRA: an open platform for reconfigurable architectures.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

On How to Efficiently Implement Deep Learning Algorithms on PYNQ Platform.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

FIDA: A Framework to Automatically Integrate FPGA Kernels Within Data-Science Applications.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

2017
Exploiting FPGAs from Higher Level Languages A Signal Analysis Case Study.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015
State-of-the-art multihoming solutions for Android: A quantitative evaluation and experience report.
Proceedings of the 11th International Conference on Network and Service Management, 2015


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