Giulio Stramondo

According to our database, Giulio Stramondo authored at least 9 papers between 2016 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Designing and building application-centric parallel memories.

Giulio Stramondo, Catalin Bogdan Ciobanu, Cees de Laat, Ana Lucia Varbanescu

Concurr. Comput. Pract. Exp., 2020

μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration.

Giulio Stramondo, Manil Dev Gomony, Bartek Kozicki, Cees de Laat, Ana Lucia Varbanescu

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2018

HLS Support for Polymorphic Parallel Memories.

Luca Stornaiuolo, Marco Rabozzi, Donatella Sciuto, Marco D. Santambrogio, Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS.

Luca Stornaiuolo, Marco Rabozzi, Marco D. Santambrogio, Donatella Sciuto, Catalin Bogdan Ciobanu, Giulio Stramondo, Ana Lucia Varbanescu

Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

EXTRA: an open platform for reconfigurable architectures.

Catalin Bogdan Ciobanu, Giulio Stramondo, Ana Lucia Varbanescu, Andreas Brokalakis, Antonis Nikitakis, Lorenzo Di Tucci, Marco Rabozzi, Luca Stornaiuolo, Marco D. Santambrogio, Grigorios Chrysos, Charalampos Vatsolakis, Georgios Charitopoulos, Dionisios N. Pnevmatikatos

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs.

Catalin Bogdan Ciobanu, Giulio Stramondo, Cees de Laat, Ana Lucia Varbanescu

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Towards Application-Centric Parallel Memories.

Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu, Cees de Laat

Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018

2017

A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration.

Amit Kulkarni, Poona Bahrebar, Dirk Stroobandt, Giulio Stramondo, Catalin Bogdan Ciobanu, Ana Lucia Varbanescu

Proceedings of the International Conference on Field Programmable Technology, 2017

2016

A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops.

Giuseppe Natale, Giulio Stramondo, Pietro Bressana, Riccardo Cattaneo, Donatella Sciuto, Marco D. Santambrogio

Proceedings of the 35th International Conference on Computer-Aided Design, 2016