M. Sultan M. Siddiqui

Orcid: 0000-0002-0698-9732

According to our database1, M. Sultan M. Siddiqui authored at least 9 papers between 2010 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2021
A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI.
IEEE Trans. Very Large Scale Integr. Syst., 2021

2019
An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI.
IEEE J. Solid State Circuits, 2019

A 10T SRAM Cell with Enhanced Read Sensing Margin and Weak NMOS Keeper for Large Signal Sensing to Improve VDDMIN.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

A Radiation Hardened SRAM with Self-refresh and Compact Error Correction.
Proceedings of the International SoC Design Conference, 2018

2017
A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
Two Phase Write Scheme to Improve Low Voltage Write-ability in Medium-Density SRAMs.
Proceedings of the 28th International Conference on VLSI Design, 2015

2010
Reaction-diffusion based model to develop binocular simple cells in visual cortex along with cortical maps.
Proceedings of the International Joint Conference on Neural Networks, 2010


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