M. Sultan M. Siddiqui
According to our database1, M. Sultan M. Siddiqui authored at least 8 papers between 2010 and 2019.
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An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI.
IEEE J. Solid State Circuits, 2019
A 10T SRAM Cell with Enhanced Read Sensing Margin and Weak NMOS Keeper for Large Signal Sensing to Improve VDDMIN.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
Proceedings of the International SoC Design Conference, 2018
A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
Proceedings of the 28th International Conference on VLSI Design, 2015
Reaction-diffusion based model to develop binocular simple cells in visual cortex along with cortical maps.
Proceedings of the International Joint Conference on Neural Networks, 2010