Manfred Selz

According to our database, Manfred Selz authored at least 4 papers between 1994 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1999

A 390-mm², 16-bank, 1-Gb DDR SDRAM with hybrid bitline architecture.

Toshiaki Kirihata, Gerhard Mueller, Brian Ji, Gerd Frankowsky, John M. Ross, Hartmud Terletzki, Dmitry G. Netis, Oliver Weinfurtner, David R. Hanson, Gabriel Daniel, Louis Lu-Chen Hsu, Daniel W. Storaska, Armin M. Reith, Marco A. Hug, Kevin P. Guay, Manfred Selz, Peter Poechmueller, Heinz Hoenigschmid, Matthew R. Wordeman

IEEE J. Solid State Circuits, 1999

1998

A 220-mm², four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture.

Toshiaki Kirihata, Martin Gall, Kohji Hosokawa, Jean-Marc Dortu, Hing Wong, Peter Pfefferl, Brian L. Ji, Oliver Weinfurtner, John K. DeBrosse, Hartmud Terletzki, Manfred Selz, Wayne Ellis, Matthew R. Wordeman, Oliver Kiehl

IEEE J. Solid State Circuits, 1998

1996

VHDL synthesis description portability: The need for Level synthesis subsets.

Manfred Selz, Wolfgang Ecker, Eugenio Villar

J. Syst. Archit., 1996

1994

Untersuchungen zur synthesegerechten Verhaltensbeschreibung mit VHDL.

Manfred Selz

PhD thesis, 1994