Brian L. Ji

According to our database1, Brian L. Ji authored at least 5 papers between 1998 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
In-Line-Test of Variability and Bit-Error-Rate of HfOx-Based Resistive Memory.
CoRR, 2015

2010
Practical Strategies for Power-Efficient Computing Technologies.
Proc. IEEE, 2010

2006
High-performance CMOS variability in the 65-nm regime and beyond.
IBM J. Res. Dev., 2006

2005
A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization.
IEEE J. Solid State Circuits, 2005

1998
A 220-mm<sup>2</sup>, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture.
IEEE J. Solid State Circuits, 1998


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