Markus Seuring

According to our database1, Markus Seuring authored at least 11 papers between 1998 and 2012.

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Bibliography

2012
Employing the STDF V4-2007 Standard for Scan Test Data Logging.
IEEE Des. Test, 2012

2006
Combining Scan Test and Built-in Self Test.
J. Electron. Test., 2006

2003
Multimode scan: Test per clock BIST for IP cores.
ACM Trans. Design Autom. Electr. Syst., 2003

Space compaction of test responses using orthogonal transmission functions [logic testing].
IEEE Trans. Instrum. Meas., 2003

2000
Output space compaction for testing and concurrent checking.
PhD thesis, 2000

Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions.
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

1999
A Structural Method for Output Compaction of Sequential Automata Implemented as Circuits.
Proceedings of the Automata Implementation, 1999

Testability evaluation of sequential designs incorporating the multi-mode scannable memory element.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

A Structural Approach for Space Compaction for Sequential Circuits.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1998
A Structural Approach for Space Compaction for Concurrent Checking and BIST.
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998


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