Geir Eide

According to our database, Geir Eide authored at least 10 papers between 2002 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

The Advancement of 1149.10.

Yu Huang, Haitao Fu, Bin Deng, Edward Seng, Marc Hutner, Jean-Francois Cote, Geir Eide

Proceedings of the IEEE International Test Conference in Asia, 2021

2020

Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs.

Jean-François Côté, Mark Kassab, Wojciech Janiszewski, Ricardo Rodrigues, Reinhard Meier, Bartosz Kaczmarek, Peter Orlando, Geir Eide, Janusz Rajski, Glenn Colón-Bonet, Naveen Mysore, Ya Yin, Pankaj Pant

Proceedings of the IEEE International Test Conference, 2020

2017

Automatic Identification of Yield Limiting Layout Patterns Using Root Cause Deconvolution on Volume Scan Diagnosis Data.

Wu-Tung Cheng, Randy Klingenberg, Brady Benware, Wu Yang, Manish Sharma, Geir Eide, Yue Tian, Sudhakar M. Reddy, Yan Pan, Sherwin Fernandes, Atul Chittora

Proceedings of the 26th IEEE Asian Test Symposium, 2017

2013

Deriving Feature Fail Rate from Silicon Volume Diagnostics Data.

Shobhit Malik, Thomas Herrmann, Sriram Madhavan, Rao Desineni, Chris Schuermyer, Geir Eide

IEEE Des. Test, 2013

2012

Employing the STDF V4-2007 Standard for Scan Test Data Logging.

Markus Seuring, Michael Braun, Alan Ma, Geir Eide, Kathy Yang, Huaxing Tang

IEEE Des. Test, 2012

2004

ITC 2003 panels: Part 2.

Carol Stolicny, Mustapha Slamani, Fidel Muradali, Geir Eide, Mike Li

IEEE Des. Test Comput., 2004

2003

Key Impediments to DFT-Focused Test and How to Overcome Them.

Kenneth E. Posse, Geir Eide

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Open Microphone - My DFT is better than yours ...

Geir Eide, Kenneth E. Posse

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

Embedded Deterministic Test for Low-Cost Manufacturing Test.

Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, Rob Thompson, Kun-Han Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Eide, Jun Qian

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Design-for-Test Techniques for SoC Designs (Tutorial Abstract).

Geir Eide

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002