Masayasu Fukunaga

According to our database, Masayasu Fukunaga authored at least 7 papers between 2003 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Estimation of Delay Test Quality and Its Application to Test Generation.

Seiji Kajihara, Shohei Morishima, Masahiro Yamamoto, Xiaoqing Wen, Masayasu Fukunaga, Kazumi Hatayama, Takashi Aikyo

IPSJ Trans. Syst. LSI Des. Methodol., 2008

2006

A dynamic test compaction procedure for high-quality path delay testing.

Masayasu Fukunaga, Seiji Kajihara, Xiaoqing Wen, Toshiyuki Maeda, Shuji Hamada, Yasuo Sato

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

On Statistical Estimation of Fault Efficiency for Path Delay Faults Based on Untestable Path Analysis.

Masayasu Fukunaga, Seiji Kajihara, Sadami Takeoka

IEICE Trans. Inf. Syst., 2005

Path delay test compaction with process variation tolerance.

Seiji Kajihara, Masayasu Fukunaga, Xiaoqing Wen, Toshiyuki Maeda, Shuji Hamada, Yasuo Sato

Proceedings of the 42nd Design Automation Conference, 2005

2003

Evaluation of Delay Testing Based on Path Selection.

Masayasu Fukunaga, Seiji Kajihara, Sadami Takeoka, Shinichi Yoshimura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

On Estimation of Fault Efficiency for Path Delay Faults.

Masayasu Fukunaga, Seiji Kajihara, Sadami Takeoka

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

On effective criterion of path selection for delay testing.

Masayasu Fukunaga, Seiji Kajihara, Sadami Takeoka, Shinichi Yosimura

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003