Masumi Saitoh

According to our database1, Masumi Saitoh authored at least 10 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Comprehensive Analysis of Hole-Trapping in SiN Films with a Wide Range of Time Constants Based on Dynamic C-V.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization Dynamics.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2020
Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Ag Ionic Memory Cell Technology for Terabit-Scale High-DensityApplication.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018
Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2016
BSIM4 parameter extraction for tri-gate Si nanowire transistors.
Microelectron. J., 2016

2015
New layout design methodology for monolithically integrated 3D CMOS logic circuits based on parasitics engineering.
Proceedings of the 45th European Solid State Device Research Conference, 2015

2006
Emerging nanoscale silicon devices taking advantage of nanostructure physics.
IBM J. Res. Dev., 2006


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