Maurice Peemen

According to our database1, Maurice Peemen authored at least 18 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
MoESR: Blind Super-Resolution using Kernel-Aware Mixture of Experts.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2022

CELR: Cloud Enhanced Local Reconstruction from low-dose sparse Scanning Electron Microscopy images.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
ConvFusion: A Model for Layer Fusion in Convolutional Neural Networks.
IEEE Access, 2021

DualSR: Zero-Shot Dual Learning for Real-World Super-Resolution.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2021

2019
Automatic Memory-Efficient Scheduling of CNNs.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

2018
A tuning approach for iterative multiple 3d stencil pipeline on GPUs: Anisotropic Nonlinear Diffusion algorithm as case study.
J. Supercomput., 2018

How should a fixed budget of dwell time be spent in scanning electron microscopy to optimize image quality?
CoRR, 2018

AivoTTA: an energy efficient programmable accelerator for CNN-based object recognition.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Sparse Scanning Electron Microscopy for Imaging and Segmentation in Connectomics.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018

2016
A configurable SIMD architecture with explicit datapath for intelligent learning.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

MacSim: A MAC-Enabled High-Performance Low-Power SIMD Architecture.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

The neuro vector engine: Flexibility to improve convolutional net efficiency for wearable vision.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Demystifying the 16 × 16 thread-block for stencils on the GPU.
Concurr. Comput. Pract. Exp., 2015

VLIW Code Generation for a Convolutional Network Accelerator.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

A Locality Aware Convolutional Neural Networks Accelerator.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Inter-tile reuse optimization applied to bandwidth constrained embedded accelerators.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
Memory-centric accelerator design for Convolutional Neural Networks.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

2011
Efficiency Optimization of Trainable Feature Extractors for a Consumer Platform.
Proceedings of the Advances Concepts for Intelligent Vision Systems, 2011


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