Maxime Nassar

According to our database, Maxime Nassar authored at least 13 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs.

Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Towards Different Flavors of Combined Side Channel Attacks.

Youssef Souissi, Shivam Bhasin, Sylvain Guilley, Maxime Nassar, Jean-Luc Danger

Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012

2011

Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks.

Maxime Nassar, Sylvain Guilley, Jean-Luc Danger

IACR Cryptol. ePrint Arch., 2011

"Re-synchronization by moments": An efficient solution to align Side-Channel traces.

Nicolas Debande, Youssef Souissi, Maxime Nassar, Sylvain Guilley, Thanh-Ha Le, Jean-Luc Danger

Proceedings of the 2011 IEEE International Workshop on Information Forensics and Security, 2011

"Rank Correction": A New Side-Channel Approach for Secret Key Recovery.

Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger

Proceedings of the Security Aspects in Information Technology, 2011

Embedded systems security: An evaluation methodology against Side Channel Attacks.

Youssef Souissi, Jean-Luc Danger, Sylvain Guilley, Shivam Bhasin, Maxime Nassar

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010

Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics.

Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu

Int. J. Reconfigurable Comput., 2010

First Principal Components Analysis: A New Side Channel Distinguisher.

Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament

Proceedings of the Information Security and Cryptology - ICISC 2010, 2010

BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation.

Maxime Nassar, Shivam Bhasin, Jean-Luc Danger, Guillaume Duc, Sylvain Guilley

Proceedings of the Design, Automation and Test in Europe, 2010

2009

DPL on Stratix II FPGA: What to Expect?.

Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow.

Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints.

Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Place-and-Route Impact on the Security of DPL Designs in FPGAs.

Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Laurent Sauvage, Philippe Hoogvorst, Maxime Nassar, Tarik Graba, Vinh-Nga Vong

Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008