Nidhal Selmane

According to our database1, Nidhal Selmane authored at least 11 papers between 2008 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks.
IET Inf. Secur., 2011

Performance evaluation of protocols resilient to physical attacks.
Proceedings of the HOST 2011, 2011

2010
Global and local Fault attacks on AES cryptoprocessor : Implementation and Countermeasures. (Attaques en fautes globales et locales sur les cryptoprocesseurs AES : mise en œuvre et contremesures).
PhD thesis, 2010

Fault Injection Resilience.
Proceedings of the 2010 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2010

Countering early evaluation: an approach towards robust dual-rail precharge logic.
Proceedings of the 5th Workshop on Embedded Systems Security, 2010

2009
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

WDDL is Protected against Setup Time Violation Attacks.
Proceedings of the Sixth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2009

2008
Fault Analysis Attack on an FPGA AES Implementation.
Proceedings of the NTMS 2008, 2008

Silicon-level Solutions to Counteract Passive and Active Attacks.
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008

Practical Setup Time Violation Attacks on AES.
Proceedings of the Seventh European Dependable Computing Conference, 2008


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