Michael Adler

According to our database1, Michael Adler authored at least 22 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1985, "For contributions to CAD modeling of power semiconductor devices.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
An Ultrasonic Rheometer to Measure Gas Absorption in Ionic Liquids: Design, Calibration and Testing.
Sensors, 2020

2018
Thermographic Quantification for Archaeological Prospection at Picuris Pueblo, New Mexico.
Proceedings of the 3rd Digital Heritage International Congress, 2018

2017
(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies.
ACM Trans. Reconfigurable Technol. Syst., 2017

Automatic Construction of Program-Optimized FPGA Memory Networks.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

The LEAP FPGA Operating System.
Proceedings of the FPGAs for Software Programmers, 2016

2015
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures.
ACM Trans. Comput. Syst., 2015

Scavenger: Automating the construction of application-optimized memory hierarchies.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Growing a Healthy FPGA Ecosystem.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Efficient Spatial Processing Element Control via Triggered Instructions.
IEEE Micro, 2014

The LEAP FPGA operating system.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

LEAP Shared Memories: Automating the Construction of FPGA Coherent Memories.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2013
Triggered instructions: a control paradigm for spatially-programmed architectures.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Optimizing under abstraction: Using prefetching to improve FPGA performance.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
ZIP-IO: Architecture for application-specific compression of Big Data.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Leveraging latency-insensitivity to ease multiple FPGA design.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Leap scratchpads: automatic memory and cache management for reconfigurable logic.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2009
A-Port Networks: Preserving the Timed Behavior of Synchronous Systems for Modeling on FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2009

Soft connections: addressing the hardware-design modularity problem.
Proceedings of the 46th Design Automation Conference, 2009

2008
Quick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008


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