Michael D. Smith

Affiliations:
  • Harvard University, Cambridge, MA, USA
  • Stanford University, Stanford, CA, USA


According to our database1, Michael D. Smith authored at least 53 papers between 1989 and 2011.

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Bibliography

2011
Voltage Noise in Production Processors.
IEEE Micro, 2011

2010
Eliminating voltage emergencies via software-guided code transformations.
ACM Trans. Archit. Code Optim., 2010

Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity.
IEEE Micro, 2010

Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009
Voltage emergency prediction: Using signatures to reduce operating margins.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack.
Proceedings of the 46th Design Automation Conference, 2009

2008
Implementing public-key infrastructure for sensor networks.
ACM Trans. Sens. Networks, 2008

DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2007
Towards a software approach to mitigate voltage emergencies.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications.
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007

SSDPOP: improving the privacy of DCOP with secret sharing.
Proceedings of the 6th International Joint Conference on Autonomous Agents and Multiagent Systems (AAMAS 2007), 2007

The Impact of Time on the Accuracy of Sentiment Classifiers Created from a Web Log Corpus.
Proceedings of the Twenty-Second AAAI Conference on Artificial Intelligence, 2007

Extending Object-Oriented Optimizations for Concurrent Programs.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

Improving Performance Isolation on Chip Multiprocessors via an Operating System Scheduler.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006
Managing bounded code caches in dynamic binary optimization systems.
ACM Trans. Archit. Code Optim., 2006

Guest Editors' Introduction: Data Surveillance.
IEEE Secur. Priv., 2006

Exploiting temporal consistency to reduce false positives in host-based, collaborative detection of worms.
Proceedings of the 2006 ACM Workshop on Rapid Malcode, 2006

Collaborative Scheduling: Threats and Promises.
Proceedings of the 5th Annual Workshop on the Economics of Information Security, 2006

Predicting the Political Sentiment of Web Log Posts Using Supervised Machine Learning Techniques Coupled with Feature Selection.
Proceedings of the Advances in Web Mining and Web Usage Analysis, 2006

2005
Host-based detection of worms through peer-to-peer cooperation.
Proceedings of the 2005 ACM Workshop on Rapid Malcode, 2005

Protecting Personal Information: Obstacles and Directions.
Proceedings of the 4th Annual Workshop on the Economics of Information Security, 2005

Improving Region Selection in Dynamic Optimization Systems.
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005

2004
Trusted Computing, Peer-to-Peer Distribution, and The Economics of Pirated Entertainment.
Proceedings of the Economics of Information Security, 2004

A public-key infrastructure for key distribution in TinyOS based on elliptic curve cryptography.
Proceedings of the First Annual IEEE Communications Society Conference on Sensor and Ad Hoc Communications and Networks, 2004

A generalized algorithm for graph-coloring register allocation.
Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, 2004

2003
Access for sale: a new class of worm.
Proceedings of the 2003 ACM Workshop on Rapid Malcode, 2003

Generational Cache Management of Code Traces in Dynamic Optimization Systems.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

How Much Security Is Enough to Stop a Thief?: The Economics of Outsider Theft via Computer Systems and Networks.
Proceedings of the Financial Cryptography, 2003

2002
Code Cache Management Schemes for Dynamic Optimizers.
Proceedings of the 6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 2002

2000
Overcoming the Challenges to Feedback-Directed Optimization.
Proceedings of ACM SIGPLAN Workshop on Dynamic and Adaptive Compilation and Optimization (Dynamo 2000), 2000

1999
Static correlated branch prediction.
ACM Trans. Program. Lang. Syst., 1999

Procedure placement using temporal-ordering information.
ACM Trans. Program. Lang. Syst., 1999

Reorganizing global schedules for register allocation.
Proceedings of the 13th international conference on Supercomputing, 1999

1998
Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications.
ACM Trans. Comput. Syst., 1998

Using Path Profiles to Predict HTTP Requests.
Comput. Networks, 1998

Quality and Speed in Linear-scan Register Allocation.
Proceedings of the ACM SIGPLAN '98 Conference on Programming Language Design and Implementation (PLDI), 1998

Better Global Scheduling Using Path Profiles.
Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998

1997
Changing Interaction of Compiler and Architecture.
Computer, 1997

System Support for Automated Profiling and Optimization.
Proceedings of the Sixteenth ACM Symposium on Operating System Principles, 1997

Near-optimal Intraprocedural Branch Alignment.
Proceedings of the ACM SIGPLAN '97 Conference on Programming Language Design and Implementation (PLDI), 1997

Procedure Placement Using Temporal Ordering Information.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

1996
The Measured Performance of Personal Computer Operating Systems.
ACM Trans. Comput. Syst., 1996

Guest Editorial: Media processing: a new design target.
IEEE Micro, 1996

Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

An Analysis of Dynamic Branch Prediction Schemes on System Workloads.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1995
Performance issues in correlated branch prediction schemes.
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

A Comparative Analysis of Schemes for Correlated Branch Prediction.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1994
A high-performance microarchitecture with hardware-programmable functional units.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994

PRISC Software Acceleration Techniques.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

Improving the Accuracy of Static Branch Prediction Using Branch Correlation.
Proceedings of the ASPLOS-VI Proceedings, 1994

1992
Efficient Superscalar Performance Through Boosting.
Proceedings of the ASPLOS-V Proceedings, 1992

1990
Boosting Beyond Static Scheduling in a Superscalar Processor.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

1989
Limits on Multiple Instruction Issue.
Proceedings of the ASPLOS-III Proceedings, 1989


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