Svilen Kanev

According to our database, Svilen Kanev authored at least 15 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Characterizing a Memory Allocator at Warehouse Scale.

Zhuangzhuang Zhou, Vaibhav Gogte, Nilay Vaish, Chris Kennelly, Patrick Xia, Svilen Kanev, Tipp Moseley, Christina Delimitrou, Parthasarathy Ranganathan

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching.

Nayana Prasad Nagendra, Bhargav Reddy Godala, Ishita Chaturvedi, Atmn Patel, Svilen Kanev, Tipp Moseley, Jared Stark, Gilles A. Pokam, Simone Campanoni, David I. August

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.

Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2020

AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.

Nayana Prasad Nagendra, Grant Ayers, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan

IEEE Micro, 2020

2017

CARB: A C-State Power Management Arbiter for Latency-Critical Workloads.

Xin Zhan, Reza Azimi, Svilen Kanev, David M. Brooks, Sherief Reda

IEEE Comput. Archit. Lett., 2017

Automatically accelerating non-numerical programs by architecture-compiler co-design.

Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks

Commun. ACM, 2017

Mallacc: Accelerating Memory Allocation.

Svilen Kanev, Sam Likun Xi, Gu-Yeon Wei, David M. Brooks

Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016

Profiling a Warehouse-Scale Computer.

Svilen Kanev, Juan Pablo Darago, Kim M. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David M. Brooks

IEEE Micro, 2016

2014

HELIX-RC: An architecture-compiler co-design for automatic parallelization of irregular programs.

Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks

Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Tradeoffs between power management and tail latency in warehouse-scale applications.

Svilen Kanev, Kim M. Hazelwood, Gu-Yeon Wei, David M. Brooks

Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014

2013

Characterizing and evaluating voltage noise in multi-core near-threshold processors.

Xuan Zhang, Tao Tong, Svilen Kanev, Sae Kyu Lee, Gu-Yeon Wei, David M. Brooks

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2012

XIOSim: power-performance modeling of mobile x86 cores.

Svilen Kanev, Gu-Yeon Wei, David M. Brooks

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

2011

Voltage Noise in Production Processors.

Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks

IEEE Micro, 2011

Portable trace compression through instruction interpretation.

Svilen Kanev, Robert Cohn

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

2010

Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling.

Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010