Sarita V. Adve

According to our database1, Sarita V. Adve authored at least 100 papers between 1990 and 2019.

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Awards

ACM Fellow

ACM Fellow 2010, "For contributions to hardware and language memory models, and to low-power and resilient systems.".

Timeline

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Bibliography

2019
ApproxHPVM: a portable compiler IR for accuracy-aware optimizations.
PACMPL, 2019

gem5-Approxilyzer: An Open-Source Tool for Application-Level Soft Error Analysis.
Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019

Minotaur: Adapting Software Testing Techniques for Hardware Errors.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018
HPVM: heterogeneous parallel virtual machine.
Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018

Spandex: A Flexible Interface for Efficient Heterogeneous Coherence.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

Impact of Software Approximations on the Resiliency of a Video Summarization System.
Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2018

2017
Chasing Away RAts: Semantics and Evaluation for Relaxed Atomics on Heterogeneous Systems.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

HeteroSync: A benchmark suite for fine-grained synchronization on tightly coupled GPUs.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017

2016
21st Century Computer Architecture.
CoRR, 2016

Approxilyzer: Towards a systematic framework for instruction-level approximate computing and its application to hardware resiliency.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

GSI: A GPU Stall Inspector to characterize the sources of memory stalls for tightly coupled GPUs.
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Resilience characterization of a vision analytics application under varying degrees of approximation.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

POSTER: hVISC: A Portable Abstraction for Heterogeneous Parallel Systems.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
Efficient GPU synchronization without scopes: saying no to complex consistency models.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Eliminating on-chip traffic waste: are we there yet?
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Stash: have your scratchpad and cache it too.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

DeNovoSync: Efficient Support for Arbitrary Synchronization without Writer-Initiated Invalidations.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
Hardware Fault Recovery for I/O Intensive Applications.
TACO, 2014

Revisiting the Complexity of Hardware Cache Coherence and Some Implications.
TACO, 2014

DeNovoND: Efficient Hardware for Disciplined Nondeterminism.
IEEE Micro, 2014

Addressing failures in exascale computing.
IJHPCA, 2014

GangES: Gang error simulation for hardware resiliency evaluation.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2013
Relyzer: Application Resiliency Analyzer for Transient Faults.
IEEE Micro, 2013

DeNovoND: efficient hardware support for disciplined non-determinism.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2013

2012
You don't know jack about shared variables or memory models.
Commun. ACM, 2012

Low-cost program-level detectors for reducing silent data corruptions.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011
Memory Models.
Proceedings of the Encyclopedia of Parallel Computing, 2011

Safe nondeterminism in a deterministic-by-default parallel language.
Proceedings of the 38th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2011

Rethinking shared-memory languages and hardware.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

Architectures for online error detection and recovery in multicore processors.
Proceedings of the Design, Automation and Test in Europe, 2011

DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
Memory models: a case for rethinking parallel languages and hardware.
Commun. ACM, 2010

Data races are evil with no exceptions: technical perspective.
Commun. ACM, 2010

Parallel SAH k-D tree construction.
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2010, 2010

2009
GRACE-2: integrating fine-grained application adaptation with global adaptation for saving energy.
IJES, 2009

Memory models: a case for rethinking parallel languages and hardware.
Proceedings of the 28th Annual ACM Symposium on Principles of Distributed Computing, 2009

A type and effect system for deterministic parallel Java.
Proceedings of the 24th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2009

mSWAT: low-cost hardware fault detection and diagnosis for multicore systems.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Accurate microarchitecture-level fault modeling for studying hardware faults.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2008
Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007.
IEEE Micro, 2008

Foundations of the C++ concurrency memory model.
Proceedings of the ACM SIGPLAN 2008 Conference on Programming Language Design and Implementation, 2008

Metrics for Architecture-Level Lifetime Reliability Analysis.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

Online Estimation of Architectural Vulnerability Factor for Soft Errors.
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Using likely program invariants to detect hardware errors.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008

Trace-based microarchitecture-level diagnosis of permanent hardware faults.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008

Understanding the propagation of hard errors to software and implications for resilient system design.
Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, 2008

2007
ALP: Efficient support for all levels of parallelism for complex media applications.
TACO, 2007

Cross-component energy management: Joint adaptation of processor and memory.
TACO, 2007

Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures.
Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2007

Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.
Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

2006
GRACE-1: Cross-Layer Adaptation for Multimedia Quality and Battery Energy.
IEEE Trans. Mob. Comput., 2006

2005
Performance directed energy management for main memory and disks.
TOS, 2005

Lifetime Reliability: Toward an Architectural Solution.
IEEE Micro, 2005

Guest Editors' Introduction: Reliability-Aware Microarchitecture.
IEEE Micro, 2005

Memory-side prefetching for linked data structures for processor-in-memory systems.
J. Parallel Distributed Comput., 2005

The Java memory model.
Proceedings of the 32nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2005

Exploiting Structural Duplication for Lifetime Reliability Enhancement.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.
Proceedings of the 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June, 2005

2004
Performance-Directed Energy Management for Storage Systems.
IEEE Micro, 2004

The Case for Lifetime Reliability-Aware Microprocessors.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

A Formal Approach to Frequent Energy Adaptations for Multimedia Applications.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

Performance Modeling and Programming Environments for Petaflops Computers and the Blue Gene Machine.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

The energy efficiency of CMP vs. SMT for multimedia workloads.
Proceedings of the 18th Annual International Conference on Supercomputing, 2004

The Impact of Technology Scaling on Lifetime Reliability.
Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004

Performance directed energy management for main memory and disks.
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003
Predictive dynamic thermal management for multimedia applications.
Proceedings of the 17th Annual International Conference on Supercomputing, 2003

Cross-layer adaptive video coding to reduce energy on general-purpose processors.
Proceedings of the 2003 International Conference on Image Processing, 2003

2002
Performance Simulation Tools.
IEEE Computer, 2002

RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors.
IEEE Computer, 2002

Soft Real- Time Scheduling on Simultaneous Multithreaded Processors.
Proceedings of the 23rd IEEE Real-Time Systems Symposium (RTSS'02), 2002

Joint local and global hardware adaptations for energy.
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001
Saving energy with architectural and frequency adaptations for multimedia applications.
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Variability in the execution of multimedia applications and implications for architecture.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

Comparing and Combining Read Miss Clustering and Software Prefetching.
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001

2000
Code Transformations to Improve Memory Parallelism.
J. Instruction-Level Parallelism, 2000

Reconfigurable caches and their application to media processing.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

1999
The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors.
IEEE Trans. Computers, 1999

Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
Analytic Evaluation of Shared-memory Systems with ILP Processors.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

Retrospective: Weak Ordering - A New Definition.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.
Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1997
RSIM: Rice simulator for ILP multiprocessors.
SIGARCH Computer Architecture News, 1997

Changing Interaction of Compiler and Architecture.
IEEE Computer, 1997

RSIM: a simulator for shared-memory multiprocessor and uniprocessor systems that exploit ILP.
Proceedings of the 1997 workshop on Computer architecture education, 1997

Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models.
Proceedings of the 9th Annual ACM Symposium on Parallel Algorithms and Architectures, 1997

The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology.
Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

An Evaluation of Fine-Grain Producer-Initiated Communication in Cache-Coherent Multiprocessors.
Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1996
Shared Memory Consistency Models: A Tutorial.
IEEE Computer, 1996

A Comparison of Entry Consistency and Lazy Release Consistency Implementations.
Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors.
Proceedings of the ASPLOS-VII Proceedings, 1996

1993
A Unified Formalization of Four Shared-Memory Models.
IEEE Trans. Parallel Distrib. Syst., 1993

1992
Programming for Different Memory Consistency Models.
J. Parallel Distributed Comput., 1992

1991
Detecting Data Races on Weak Memory Systems.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

Comparison of Hardware and Software Cache Coherence Schemes.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

1990
Weak Ordering - A New Definition.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Implementing Sequential Consistency in Cache-Based Systems.
Proceedings of the 1990 International Conference on Parallel Processing, 1990


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