Michael Kirkedal Thomsen

Sophie Adeline Solheim Bosio

CoRR, 2023

pun: Fun with Properties; Towards a Programming Language With Built-in Facilities for Program Validation.

[BibT_eX]

[DOI]

Triera Gashi

CoRR, 2023

Tail Recursion Transformation for Invertible Functions.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 15th International Conference, 2023

2022

Branching execution symmetry in Jeopardy by available implicit arguments analysis.

[BibT_eX]

[DOI]

CoRR, 2022

Jeopardy: An Invertible Functional Programming Language.

[BibT_eX]

[DOI]

CoRR, 2022

2020

Reversible Languages and Incremental State Saving in Optimistic Parallel Discrete Event Simulation.

[BibT_eX]

[DOI]

Markus Schordan

Tomas Oppelstrup

Proceedings of the Reversible Computation: Extending Horizons of Computing, 2020

2018

Encryption and Reversible Computations - Work-in-progress Paper.

[BibT_eX]

[DOI]

Dominik Táborský

Ken Friis Larsen

Petur Andrias Højgaard Jacobsen

Proceedings of the Reversible Computation - 10th International Conference, 2018

\mathsf CoreFun : A Typed Functional Reversible Core Language.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 10th International Conference, 2018

2017

Reverse Execution in Testing – Improving Security and Reliability (NII Shonan Meeting 2017-9).

[BibT_eX]

[DOI]

Kazutaka Matsuda

Mohammad Reza Mousavi

NII Shonan Meet. Rep., 2017

An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs.

[BibT_eX]

[DOI]

Robert Wille

Oliver Keszöcze

Lars Othmer

J. Low Power Electron., 2017

Hardness of Deriving Invertible Sequences from Finite State Machines.

[BibT_eX]

[DOI]

Robert M. Hierons

Mohammad Reza Mousavi

Uraz Cengiz Türker

Proceedings of the SOFSEM 2017: Theory and Practice of Computer Science, 2017

2016

Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs - Work in Progress Report.

[BibT_eX]

[DOI]

Robert Wille

Oliver Keszöcze

Lars Othmer

Proceedings of the Reversible Computation - 8th International Conference, 2016

Generating and checking control logic in the HDL-based design of reversible circuits.

[BibT_eX]

[DOI]

Robert Wille

Oliver Keszöcze

Lars Othmer

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

2015

Self-Inverse Functions and Palindromic Circuits.

[BibT_eX]

[DOI]

Gerhard W. Dueck

D. Michael Miller

CoRR, 2015

Ricercar: A Language for Describing and Rewriting Reversible Circuits with Ancillae and Its Permutation Semantics.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 7th International Conference, 2015

Execution Tracing of C Code for Formal Analysis (Extended Abstract).

[BibT_eX]

Heinz Riener

Görschwin Fey

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015

Interpretation and programming of the reversible functional language RFUN.

[BibT_eX]

[DOI]

Proceedings of the 27th Symposium on the Implementation and Application of Functional Programming Languages, 2015

2014

Designing Garbage-Free Reversible Implementations of the Integer Cosine Transform.

[BibT_eX]

[DOI]

Torben Ægidius Mogensen

Eva Rotenberg

Tetsuo Yokoyama

ACM J. Emerg. Technol. Comput. Syst., 2014

Upper bounds for reversible circuits based on Young subgroups.

[BibT_eX]

[DOI]

Nabila Abdessaied

Inf. Process. Lett., 2014

2013

White Dots do Matter: Rewriting Reversible Logic Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 5th International Conference, 2013

Strength of the Reversible, Garbage-Free 2 k ±1 Multiplier.

[BibT_eX]

[DOI]

Eva Rotenberg

James Cranch

Proceedings of the Reversible Computation - 5th International Conference, 2013

2012

Reversible Implementation of a Discrete Integer Linear Transformation.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2012

Garbageless Reversible Implementation of Integer Linear Transformations.

[BibT_eX]

[DOI]

Kenneth Vermeirsch

Proceedings of the Reversible Computation, 4th International Workshop, 2012

Garbage-Free Reversible Integer Multiplication with Constants of the Form 2 k ±2 l ±1.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation, 4th International Workshop, 2012

Cleaning Up: Garbage-Free Reversible Circuits by Design Languages.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Electronic System Design, 2012

A functional language for describing reversible logic.

[BibT_eX]

[DOI]

Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

2011

A Reversible Processor Architecture and Its Reversible Logic Design.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - Third International Workshop, 2011

Interfacing Reversible Pass-Transistor CMOS Chips with Conventional Restoring CMOS Circuits.

[BibT_eX]

[DOI]

Michal Klimczak

Mariusz Olczak

Proceedings of the Reversible Computation - Third International Workshop, 2011

Describing and Optimising Reversible Logic Using a Functional Language.

[BibT_eX]

[DOI]

Proceedings of the Implementation and Application of Functional Languages, 2011

2009

Parallelization of Reversible Ripple-Carry Adders.

[BibT_eX]

[DOI]

Parallel Process. Lett., 2009

MicroPower: Towards Low-Power Microprocessors with Reversible Computing.

[BibT_eX]

[DOI]

ERCIM News, 2009

2008

Optimized reversible binary-coded decimal adders.

[BibT_eX]

[DOI]

J. Syst. Archit., 2008

Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder.

[BibT_eX]

[DOI]