Mohammed M. Abdul-Latif

According to our database1, Mohammed M. Abdul-Latif authored at least 7 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A 3.8 mW/Gbps Quad-Channel 8.5-13 Gbps Serial Link With a 5 Tap DFE and a 4 Tap Transmit FFE in 28 nm CMOS.
IEEE J. Solid State Circuits, 2016

2015
A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015

2014
A 23mW/lane 1.2-6.8Gb/s multi-standard transceiver in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS.
IEEE J. Solid State Circuits, 2013

A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
Low Phase Noise Wide Tuning Range N-Push Cyclic-Coupled Ring Oscillators.
IEEE J. Solid State Circuits, 2012

2011
A Wideband Millimeter-Wave Frequency Synthesis Architecture Using Multi-Order Harmonic-Synthesis and Variable N -Push Frequency Multiplication.
IEEE J. Solid State Circuits, 2011


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