Lakshmi P. Rao

According to our database, Lakshmi P. Rao authored at least 8 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology.

Bo Zhang, Anand Vasani, Ashutosh Sinha, Alireza Nilchi, Haitao Tong, Lakshmi P. Rao, Karapet Khanoyan, Hamid Hatamkhani, Xiaochen Yang, Xin Meng, Alexander Wong, Jun Kim, Ping Jing, Yehui Sun, Ali Nazemi, Dean Liu, Anthony Brewster, Jun Cao, Afshin Momtaz

IEEE J. Solid State Circuits, January, 2024

18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOS.

Guansheng Li, Adesh Garg, Tim He, Ullas Singh, Jiawen Zhang, Lakshmi P. Rao, Chang Liu, Meisam Honarvar Nazari, Yang Liu, Yong Liu, Heng Zhang, Tamer A. Ali, Hyo-Gyuem Rhew, Jiayoon Ru, Delong Cui, Ali Nazemi, Bo Zhang, Afshin Momtaz, Jun Cao

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology.

Bo Zhang, Anand Vasani, Ashutosh Sinha, Alireza Nilchi, Haitao Tong, Lakshmi P. Rao, Karapet Khanoyan, Hamid Hatamkhani, Xiaochen Yang, Xin Meng, Alexander Wong, Jun Kim, Ping Jing, Yehui Sun, Ali Nazemi, Dean Liu, Anthony Brewster, Jun Cao, Afshin Momtaz

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2016

A 3.8 mW/Gbps Quad-Channel 8.5-13 Gbps Serial Link With a 5 Tap DFE and a 4 Tap Transmit FFE in 28 nm CMOS.

Namik Kocaman, Tamer A. Ali, Lakshmi P. Rao, Ullas Singh, Mohammed M. Abdul-Latif, Yang Liu, Amr Amin Hafez, Henry Park, Anand Vasani, Zhi Huang, Arvindh Iyer, Bo Zhang, Afshin Momtaz

IEEE J. Solid State Circuits, 2016

A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ADC/5-tap DFE receiver and a 4-tap FFE transmitter in 28 nm CMOS.

Bharath Raghavan, Aida Varzaghani, Lakshmi P. Rao, Henry Park, Xiaochen Yang, Zhi Huang, Yu Chen, Rama Kattamuri, Chunhui Wu, Bo Zhang, Jun Cao, Afshin Momtaz, Namik Kocaman

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2012

Canceling the ISI Due to Finite S/H Bandwidth in a Circular Buffer Forward Equalizer.

Nattapol Sitthimahachaikul, Lakshmi P. Rao, Paul J. Hurst

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Overcoming the Effect of the Summation-Node Parasitic Pole in an Analog Equalizer.

Nattapol Sitthimahachaikul, Lakshmi P. Rao, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Correcting the Effects of Mismatches in Time-Interleaved Analog Adaptive FIR Equalizers.

Lakshmi P. Rao, Nattapol Sitthimahachaikul, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2012