Motomu Takatsu

According to our database, Motomu Takatsu authored at least 3 papers between 2003 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Digital Annealer for High-Speed Solving of Combinatorial optimization Problems and Its Applications.

Satoshi Matsubara, Motomu Takatsu, Toshiyuki Miyazawa, Takayuki Shibasaki, Yasuhiro Watanabe, Kazuya Takemoto, Hirotaka Tamura

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2017

Ising-Model Optimizer with Parallel-Trial Bit-Sieve Engine.

Satoshi Matsubara, Hirotaka Tamura, Motomu Takatsu, Danny Yoo, Behraz Vatankhahghadim, Hironobu Yamasaki, Toshiyuki Miyazawa, Sanroku Tsukamoto, Yasuhiro Watanabe, Kazuya Takemoto, Ali Sheikholeslami

Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2017

2003

A CMOS multichannel 10-Gb/s transceiver.

Hideki Takauchi, Hirotaka Tamura, Satoshi Matsubara, Masaya Kibune, Yoshiyasu Doi, Takaya Chiba, Hideaki Anbutsu, Hisakatsu Yamaguchi, Toshihiko Mori, Motomu Takatsu, Kohtaroh Gotoh, Toshiaki Sakai, Takeshi Yamamura

IEEE J. Solid State Circuits, 2003