Naeem Abbas

According to our database1, Naeem Abbas
  • authored at least 9 papers between 2010 and 2017.
  • has a "Dijkstra number"2 of four.

Timeline

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
MOCHA: Morphable Locality and Compression Aware Architecture for Convolutional Neural Networks.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

2016
TransMap: Transformation Based Remapping and Parallelism for High Utilization and Energy Efficiency in CGRAs.
IEEE Trans. Computers, 2016

2015
TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

Combining execution pipelines to improve parallel implementation of HMMER on FPGA.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

2014
Run-time parallelization switching for resource optimization on an MPSoC platform.
Design Autom. for Emb. Sys., 2014

Optimized design of sun sensor and centroid algorithm for small satellite mission.
Proceedings of the 4th International Conference on Wireless Communications, 2014

TransPar: Transformation based dynamic Parallelism for low power CGRAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2012
Acceleration of a bioinformatics application using high-level synthesis. (Accélération d'une application en bioinformatique utilisant une synthèse de haut niveau).
PhD thesis, 2012

2010
Accelerating HMMER on FPGA using parallel prefixes and reductions.
Proceedings of the International Conference on Field-Programmable Technology, 2010


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