Nobuaki Miyakawa

According to our database1, Nobuaki Miyakawa authored at least 9 papers between 1994 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
Keep-Out-Zone analysis for three-dimensional ICs.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

2009
A 3D prototyping chip based on a wafer-level stacking technology.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Multilayer stacking technology using wafer-to-wafer stacked method.
ACM J. Emerg. Technol. Comput. Syst., 2008

Stacking technology based on 8-inch wafers using direct connection between TSV and micro-bump.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2002
A novel parallel algorithm for large-scale Fock matrix construction with small locally distributed memory architectures: RT parallel algorithm.
J. Comput. Chem., 2002

1999
Development of MD Engine: High-speed accelerator with parallel processor design for molecular dynamics simulations.
J. Comput. Chem., 1999

MOE: A Special-Purpose Parallel Computer for High-Speed, Large-Scale Molecular Orbital Calculation.
Proceedings of the ACM/IEEE Conference on Supercomputing, 1999

1998
Future system-on-silicon LSI chips.
IEEE Micro, 1998

1994
An outline font rendering processor with an embedded RISC CPU for high-speed hint processing.
IEEE J. Solid State Circuits, March, 1994


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