Katsuyuki Sakuma

Orcid: 0000-0001-8162-7064

According to our database1, Katsuyuki Sakuma authored at least 13 papers between 1998 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2020
Back to Finger-Writing: Fingertip Writing Technology Based on Pressure Sensing.
IEEE Access, 2020

2019
Turning the Finger into a Writing Tool.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

2013
Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2011
Low temperature Au-Au bonding with VUV/O3 treatment.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

Thermal stress analysis of die stacks with fine-pitch IMC interconnections for 3D integration.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

Chip-level TSV integration for rapid prototyping of 3D system LSIs.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
High density 3D integration by pre-applied Inter Chip Fill.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

Thermal resistance measurements of interconnections for a three-dimensional (3D) chip stack.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections.
IBM J. Res. Dev., 2008

Three-dimensional silicon integration.
IBM J. Res. Dev., 2008

3D chip stacking with C4 technology.
IBM J. Res. Dev., 2008

1998
Future system-on-silicon LSI chips.
IEEE Micro, 1998


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