Nobuaki Otsuka

According to our database1, Nobuaki Otsuka authored at least 10 papers between 1997 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
A 0.13 µm CMOS Bluetooth EDR Transceiver with High Sensitivity over Wide Temperature Range and Immunity to Process Variation.
IEICE Trans. Electron., 2010

2008
Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation.
Proceedings of the 2008 IEEE International Test Conference, 2008

A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-×-ratio Memory Cell.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

An RF MEMS Variable Capacitor with Intelligent Bipolar Actuation.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
A -90 dBm sensitivity 0.13 μm CMOS bluetooth transceiver operating in wide temperature range.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
A low leakage SRAM macro with replica cell biasing scheme.
IEEE J. Solid State Circuits, 2006

2005
DFT techniques for memory macro with built-in ECC.
Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005

2002
DFT Techniques for Wafer-Level At-Speed Testing of High-Speed SRAMs.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

1997
Circuit techniques for 1.5-V power supply flash memory.
IEEE J. Solid State Circuits, 1997


  Loading...