According to our database1, Paul Racunas authored at least 11 papers between 1997 and 2022.
Legend:Book In proceedings Article PhD thesis Dataset Other
On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors.
Proceedings of the IEEE International Test Conference, 2020
Proceedings of the IEEE International Test Conference, 2019
Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2018
A fast and accurate analytical technique to compute the AVF of sequential bits in a processor.
Proceedings of the 48th International Symposium on Microarchitecture, 2015
IEEE Comput. Archit. Lett., 2008
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
Proceedings of the 17th Annual International Conference on Supercomputing, 2003
Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997