Paulo C. Santos
Orcid: 0000-0001-8555-2637Affiliations:
- Federal University of Rio Grande do Sul, Porto Alegre, Brazil
  According to our database1,
  Paulo C. Santos
  authored at least 34 papers
  between 2012 and 2024.
  
  
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
- 
    on orcid.org
On csauthors.net:
Bibliography
  2024
    J. Parallel Distributed Comput., 2024
    
  
    Comput. Secur., 2024
    
  
    IEEE Access, 2024
    
  
  2023
    Integr., 2023
    
  
  2022
    Microprocess. Microsystems, April, 2022
    
  
    J. Syst. Archit., 2022
    
  
    Proceedings of the XII Brazilian Symposium on Computing Systems Engineering, 2022
    
  
    Proceedings of the 2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2022
    
  
    Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
    
  
Aggressive Performance Improvement on Processing-in-Memory Devices by Adopting Hugepages.
    
  
    Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
    
  
  2021
Enabling Near-Data Accelerators Adoption by Through Investigation of Datapath Solutions.
    
  
    Int. J. Parallel Program., 2021
    
  
    Proceedings of the 29th Euromicro International Conference on Parallel, 2021
    
  
    Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
    
  
    Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
    
  
  2019
A Technologically Agnostic Framework for Cyber-Physical and IoT Processing-in-Memory-based Systems Simulation.
    
  
    Microprocess. Microsystems, 2019
    
  
    Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
    
  
    Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
    
  
    Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
    
  
Exploiting Reconfigurable Vector Processing for Energy-Efficient Computation in 3D-Stacked Memories.
    
  
    Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019
    
  
  2018
    Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018
    
  
    Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
    
  
    Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
    
  
    Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
    
  
  2017
A generic processing in memory cycle accurate simulator under hybrid memory cube architecture.
    
  
    Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
    
  
    Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
    
  
    Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017
    
  
  2016
Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency.
    
  
    Proceedings of the 24th Euromicro International Conference on Parallel, 2016
    
  
    Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
    
  
  2015
    Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
    
  
    Proceedings of the 2015 International Symposium on Memory Systems, 2015
    
  
    Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015
    
  
    Proceedings of the 2015 International Conference on Compilers, 2015
    
  
  2012
Adapting communication for adaptable processors: A multi-axis reconfiguration approach.
    
  
    Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012