Stefanos Kaxiras
Orcid: 0000-0001-8267-0232Affiliations:
- Uppsala University
According to our database1,
Stefanos Kaxiras
authored at least 127 papers
between 1991 and 2023.
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Bibliography
2023
ACM Trans. Archit. Code Optim., March, 2023
J. Parallel Distributed Comput., March, 2023
ReCon: Efficient Detection, Management, and Use of Non-Speculative Information Leakage.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Doppelganger Loads: A Safe, Complexity-Effective Optimization for Secure Speculation Schemes.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Proceedings of the IEEE International Symposium on Workload Characterization, 2023
2022
J. Supercomput., 2022
Data-Out Instruction-In (DOIN!): Leveraging Inclusive Caches to Attack Speculative Delay Schemes.
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
Proceedings of the IEEE International Symposium on Workload Characterization, 2022
Proceedings of the 11th International Workshop on Hardware and Architectural Support for Security and Privacy, 2022
2021
ACM Trans. Archit. Code Optim., 2021
"It's a Trap!"-How Speculation Invariance Can Be Abused with Forward Speculative Interference.
CoRR, 2021
CoRR, 2021
Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions.
IEEE Comput. Archit. Lett., 2021
Seeds of SEED: Preventing Priority Inversion in Instruction Scheduling to Disrupt Speculative Interference.
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021
Do Not Predict - Recompute! How Value Recomputation Can Truly Boost the Performance of Invisible Speculation.
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
Understanding Selective Delay as a Method for Efficient Secure Speculative Execution.
IEEE Trans. Computers, 2020
ACM J. Emerg. Technol. Comput. Syst., 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Clearing the Shadows: Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020
2019
Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit.
J. Signal Process. Syst., 2019
Efficient invisible speculative execution through selective delay and value prediction.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
2018
Automatic Detection of Large Extended Data-Race-Free Regions with Conflict Isolation.
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Trans. Computers, 2018
Log. Methods Comput. Sci., 2018
SWOOP: software-hardware co-design for non-speculative, execute-ahead, in-order cores.
Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
2017
Efficient Self-Invalidation/Self-Downgrade for Critical Sections with Relaxed Semantics.
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Comput. Archit. Lett., 2017
Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017
Proceedings of the Computing Frontiers Conference, 2017
2016
ACM Trans. Archit. Code Optim., 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016
Proceedings of the Formal Techniques for Distributed Objects, Components, and Systems, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Multiversioned decoupled access-execute: the key to energy-efficient compilation of general-purpose programs.
Proceedings of the 25th International Conference on Compiler Construction, 2016
POSTER: Efficient Self-Invalidation/Self-Downgrade for Critical Sections with Relaxed Semantics.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
The Effects of Granularity and Adaptivity on Private/Shared Classification for Coherence.
ACM Trans. Archit. Code Optim., 2015
Callback: efficient synchronization without invalidation with a directory just for spin-waiting.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
Turning Centralized Coherence and Distributed Critical-Section Execution on their Head: A New Approach for Scalable Distributed Shared Memory.
Proceedings of the 24th International Symposium on High-Performance Parallel and Distributed Computing, 2015
Hierarchical private/shared classification: The key to simple and efficient coherence for clustered cache hierarchies.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2015
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015
2014
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01745-2, 2014
J. Supercomput., 2014
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014
Fix the code. Don't tweak the hardware: A new compiler approach to Voltage-Frequency scaling.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014
2013
Computing, 2013
Proceedings of the 2013 IEEE 21st International Symposium on Modelling, 2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
Proceedings of the International Conference on Supercomputing, 2013
2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Proceedings of the 20th IEEE International Symposium on Modeling, 2012
Proceedings of the 15th International Conference on Compilers, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
Leakage-efficient design of value predictors through state and non-state preserving techniques.
J. Supercomput., 2011
Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011
Token3D: Reducing Temperature in 3D Die-Stacked CMPs through Cycle-Level Power Control Mechanisms.
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011
Multicore Cache Simulations Using Heterogeneous Computing on General Purpose and Graphics Processors.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
2010
IEEE Micro, 2010
Teaching Introduction to Computing Through a Project-Based Collaborative Learning Approach.
Proceedings of the 14th Panhellenic Conference on Informatics, 2010
Proceedings of the 7th Conference on Computing Frontiers, 2010
Proceedings of the 7th Conference on Computing Frontiers, 2010
Proceedings of the Architecture of Computing Systems, 2010
2009
Trans. High Perform. Embed. Archit. Compil., 2009
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2008
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01721-6, 2008
Non deterministic caches: a simple and effective defense against side channel attacks.
Des. Autom. Embed. Syst., 2008
Proceedings of the 5th Conference on Computing Frontiers, 2008
2007
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the High Performance Embedded Architectures and Compilers, 2007
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2007
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors.
Proceedings of the 4th Conference on Computing Frontiers, 2007
2006
Proceedings of the Embedded Computer Systems: Architectures, 2006
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
Proceedings of the Architecture of Computing Systems, 2006
2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the INFOCOM 2005. 24th Annual Joint Conference of the IEEE Computer and Communications Societies, 2005
2004
ACM Trans. Archit. Code Optim., 2004
4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
2003
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
2002
Let caches decay: reducing leakage energy via exploitation of cache generational behavior.
ACM Trans. Comput. Syst., 2002
IEEE Comput. Archit. Lett., 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002
2001
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001
Proceedings of the 2001 International Conference on Compilers, 2001
2000
Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
1999
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999
1998
A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors.
Proceedings of the 12th international conference on Supercomputing, 1998
1997
Proceedings of the 24th International Symposium on Computer Architecture, 1997
1996
Proceedings of the 10th international conference on Supercomputing, 1996
1992
PSM: software tool for simulating, prototyping, and monitoring of multiprocessor systems.
Inf. Softw. Technol., 1992
1991
A Prolog-based design environment for the high-level synthesis of application-specific architectures.
Microprocessing and Microprogramming, 1991