Juan L. Aragón
Orcid: 0000-0002-4955-7235
According to our database1,
Juan L. Aragón
authored at least 58 papers
between 2001 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Graphfire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics.
IEEE Trans. Computers, 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023
2022
Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency.
IEEE Trans. Vis. Comput. Graph., 2022
Energy-efficient design of a presbyopia correction wearable powered by mobile GPUs and FPGAs.
J. Supercomput., 2022
Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs.
J. Supercomput., 2022
ACM Trans. Archit. Code Optim., 2022
Proceedings of the 30th Euromicro International Conference on Parallel, 2022
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
Proceedings of the IEEE International Symposium on Workload Characterization, 2022
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
Fast and Accurate SER Estimation for Large Combinational Blocks in Early Stages of the Design.
IEEE Trans. Sustain. Comput., 2021
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures.
ACM Trans. Archit. Code Optim., 2021
2020
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2019
ACM Trans. Archit. Code Optim., 2019
GPU-based processing of Hartmann-Shack images for accurate and high-speed ocular wavefront sensing.
Future Gener. Comput. Syst., 2019
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
2018
Design of an accurate and high-speed binocular pupil tracking system based on GPGPUs.
J. Supercomput., 2018
2017
Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures.
ACM Trans. Archit. Code Optim., 2017
2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
2015
Distributed Comput., 2015
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015
DeSC: decoupled supply-compute communication management for heterogeneous architectures.
Proceedings of the 48th International Symposium on Microarchitecture, 2015
2014
J. Supercomput., 2014
2013
ACM Trans. Archit. Code Optim., 2013
Computing, 2013
2012
J. Supercomput., 2012
2011
Leakage-efficient design of value predictors through state and non-state preserving techniques.
J. Supercomput., 2011
Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Token3D: Reducing Temperature in 3D Die-Stacked CMPs through Cycle-Level Power Control Mechanisms.
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011
2010
IEEE Trans. Computers, 2010
Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs.
J. Syst. Archit., 2010
Proceedings of the 18th Euromicro Conference on Parallel, 2010
Proceedings of the 2010 International Conference on High Performance Computing, 2010
Proceedings of the Architecture of Computing Systems, 2010
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the Euro-Par 2009 Parallel Processing, 2009
2008
An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures.
J. Supercomput., 2008
J. Syst. Archit., 2008
Address Compression and Heterogeneous Interconnects for Energy-Efficient High-Performance in Tiled CMPs.
Proceedings of the 2008 International Conference on Parallel Processing, 2008
2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Efficient Message Management in Tiled CMP Architectures Using a Heterogeneous Interconnection Network.
Proceedings of the High Performance Computing, 2007
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors.
Proceedings of the 4th Conference on Computing Frontiers, 2007
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures.
Proceedings of the 21st International Conference on Advanced Information Networking and Applications (AINA 2007), 2007
2006
IEEE Trans. Computers, 2006
2005
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005
2004
Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors.
Proceedings of the 2004 Design, 2004
2003
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
2002
Proceedings of the 16th international conference on Supercomputing, 2002
2001
Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the High Performance Computing - HiPC 2001, 8th International Conference, 2001